summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Commit message (Expand)AuthorAgeFilesLines
* Extract LaneBitmask into a separate typeKrzysztof Parzyszek2016-12-151-1/+2
* AMDGPU: Fix handling of 16-bit immediatesMatt Arsenault2016-12-101-13/+0
* AMDGPU/SI: Don't reserve XNACK when it's disabledMarek Olsak2016-12-091-1/+1
* AMDGPU/SI: Don't reserve FLAT_SCR on non-HSA targets & without stack objectsMarek Olsak2016-12-091-6/+15
* AMDGPU/SI: Allow using SGPRs 96-101 on VIMarek Olsak2016-12-091-5/+7
* [AMDGPU] Fix number of reserved SGPRs on CI to reflect flat scratch useStanislav Mekhanoshin2016-12-081-0/+2
* AMDGPU: Properly implement SIRegisterInfo::isFrameOffsetLegal and needsFrameB...Nicolai Haehnle2016-12-081-5/+21
* AMDGPU: remove a couple of unused variablesSaleem Abdulrasool2016-12-031-14/+2
* AMDGPU: Use wider scalar spills for SGPR spillingMatt Arsenault2016-12-021-15/+70
* AMDGPU: Materialize frame index before addMatt Arsenault2016-11-291-1/+6
* AMDGPU/SI: Add back reverted SGPR spilling code, but disable itMarek Olsak2016-11-251-75/+200
* Revert "AMDGPU: Implement SGPR spilling with scalar stores"Marek Olsak2016-11-251-99/+7
* Revert "AMDGPU: Fix MMO when splitting spill"Marek Olsak2016-11-251-71/+44
* Revert "AMDGPU: Fix adding extra implicit def of register"Marek Olsak2016-11-251-25/+14
* Revert "AMDGPU: Fix not setting kill flag on temp reg when spilling"Marek Olsak2016-11-251-1/+1
* Revert "AMDGPU: Make m0 unallocatable"Marek Olsak2016-11-251-1/+1
* Revert "AMDGPU: Remove m0 spilling code"Marek Olsak2016-11-251-3/+37
* Revert "AMDGPU: Preserve m0 value when spilling"Marek Olsak2016-11-251-34/+5
* AMDGPU: Preserve m0 value when spillingMatt Arsenault2016-11-241-5/+34
* TRI: Add hook to pass scavenger during frame eliminationMatt Arsenault2016-11-241-0/+10
* AMDGPU: Remove m0 spilling codeMatt Arsenault2016-11-241-37/+3
* AMDGPU: Make m0 unallocatableMatt Arsenault2016-11-241-1/+1
* AMDGPU: Fix not setting kill flag on temp reg when spillingMatt Arsenault2016-11-231-1/+1
* AMDGPU: Fix adding extra implicit def of registerMatt Arsenault2016-11-231-14/+25
* AMDGPU: Fix MMO when splitting spillMatt Arsenault2016-11-231-44/+71
* Fix spelling mistakes in AMDGPU target comments. NFC.Simon Pilgrim2016-11-181-1/+1
* AMDGPU/SI: Avoid creating unnecessary copies in the SIFixSGPRCopies passTom Stellard2016-11-161-11/+14
* AMDGPU: Implement SGPR spilling with scalar storesMatt Arsenault2016-11-131-7/+99
* AMDGPU: Try to fix (non-clang?) bot buildsMatt Arsenault2016-11-071-10/+10
* AMDGPU: Refactor copyPhysRegMatt Arsenault2016-11-071-0/+103
* AMDGPU: Stop creating unused virtual registersMatt Arsenault2016-11-011-2/+5
* AMDGPU: Fix using incorrect private resource with no allocationMatt Arsenault2016-10-281-1/+12
* Reapply "AMDGPU: Don't use offen if it is 0"Matt Arsenault2016-10-261-9/+95
* AMDGPU: Fix use-after-freesNicolai Haehnle2016-10-141-1/+1
* AMDGPU: Do not re-use tmpreg in spill/restore loweringMatthias Braun2016-10-051-2/+2
* AMDGPU: Factor SGPR spilling into separate functionsMatt Arsenault2016-10-041-129/+160
* AMDGPU: Fix typoMatt Arsenault2016-10-031-1/+1
* Revert "AMDGPU: Don't use offen if it is 0"Mehdi Amini2016-10-011-95/+9
* AMDGPU: Don't use offen if it is 0Matt Arsenault2016-10-011-9/+95
* AMDGPU: Rename spill operands to match real instructionMatt Arsenault2016-09-171-10/+10
* AMDGPU/SI: Add support for triples with the mesa3d operating systemTom Stellard2016-09-161-1/+2
* AMDGPU: Remove code I think is deadMatt Arsenault2016-09-131-27/+3
* AMDGPU: Implement is{LoadFrom|StoreTo}FrameIndexMatt Arsenault2016-09-101-2/+2
* AMDGPU] Assembler: better support for immediate literals in assembler.Sam Kolton2016-09-091-2/+4
* [AMDGPU] Wave and register controlsKonstantin Zhuravlyov2016-09-061-123/+178
* AMDGPU: Fix spilling of m0Matt Arsenault2016-09-031-2/+26
* AMDGPU/SI: Implement a custom MachineSchedStrategyTom Stellard2016-08-291-0/+6
* XXXTom Stellard2016-08-261-1/+1
* AMDGPU/SI: Use a better method for determining the largest pressure setsTom Stellard2016-08-261-9/+28
* AMDGPU: Remove custom getSubRegMatt Arsenault2016-08-111-72/+10
OpenPOWER on IntegriCloud