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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-11-24 00:26:47 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-11-24 00:26:47 +0000 |
commit | 94b32ffe8e28c9efeeacd1b1157dc26428e32e11 (patch) | |
tree | 3a2227be80ecfd4f9f039a7634cf43774fefa797 /llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | |
parent | 5ee33253589755df83bd111136e4ffbdd0478b3a (diff) | |
download | bcm5719-llvm-94b32ffe8e28c9efeeacd1b1157dc26428e32e11.tar.gz bcm5719-llvm-94b32ffe8e28c9efeeacd1b1157dc26428e32e11.zip |
TRI: Add hook to pass scavenger during frame elimination
The scavenger was not passed if requiresFrameIndexScavenging was
enabled. I need to be able to test for the availability of an
unallocatable register here, so I can't create a virtual register for
it.
It might be better to just always use the scavenger and stop
creating virtual registers.
llvm-svn: 287843
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index e833b2e9fb3..93c2060381d 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -182,6 +182,16 @@ SIRegisterInfo::requiresFrameIndexScavenging(const MachineFunction &MF) const { return MF.getFrameInfo().hasStackObjects(); } +bool SIRegisterInfo::requiresFrameIndexReplacementScavenging( + const MachineFunction &MF) const { + // m0 is needed for the scalar store offset. m0 is unallocatable, so we can't + // create a virtual register for it during frame index elimination, so the + // scavenger is directly needed. + return MF.getFrameInfo().hasStackObjects() && + MF.getSubtarget<SISubtarget>().hasScalarStores() && + MF.getInfo<SIMachineFunctionInfo>()->hasSpilledSGPRs(); +} + bool SIRegisterInfo::requiresVirtualBaseRegisters( const MachineFunction &) const { // There are no special dedicated stack or frame pointers. |