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author | Marek Olsak <marek.olsak@amd.com> | 2016-12-09 19:49:48 +0000 |
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committer | Marek Olsak <marek.olsak@amd.com> | 2016-12-09 19:49:48 +0000 |
commit | 693e9be9181eb8b3cc91e254a2acb49accafbd9c (patch) | |
tree | ab20f69676574812c4cb167ea1e0a44a85374fbc /llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | |
parent | 91f22fbf4f5285586dfe8ca5e09a1880e82a2eb3 (diff) | |
download | bcm5719-llvm-693e9be9181eb8b3cc91e254a2acb49accafbd9c.tar.gz bcm5719-llvm-693e9be9181eb8b3cc91e254a2acb49accafbd9c.zip |
AMDGPU/SI: Don't reserve FLAT_SCR on non-HSA targets & without stack objects
Summary: This frees 2 scalar registers.
Reviewers: tstellarAMD
Subscribers: qcolombet, arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye
Differential Revision: https://reviews.llvm.org/D27150
llvm-svn: 289261
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index bdbce8a9dac..0fdd203b3d0 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -1178,11 +1178,19 @@ unsigned SIRegisterInfo::getNumAddressableSGPRs(const SISubtarget &ST) const { return 104; } -unsigned SIRegisterInfo::getNumReservedSGPRs(const SISubtarget &ST) const { +unsigned SIRegisterInfo::getNumReservedSGPRs(const SISubtarget &ST, + const SIMachineFunctionInfo &MFI) const { + if (MFI.hasFlatScratchInit()) { + if (ST.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS) + return 6; // FLAT_SCRATCH, XNACK, VCC (in that order) + + if (ST.getGeneration() == AMDGPUSubtarget::SEA_ISLANDS) + return 4; // FLAT_SCRATCH, VCC (in that order) + } + if (ST.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS) - return 6; // VCC, FLAT_SCRATCH, XNACK. - if (ST.getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS) - return 4; // VCC, FLAT_SCRATCH. + return 4; // XNACK, VCC (in that order) + return 2; // VCC. } @@ -1254,7 +1262,7 @@ unsigned SIRegisterInfo::getMaxNumSGPRs(const MachineFunction &MF) const { F, "amdgpu-num-sgpr", MaxNumSGPRs); // Make sure requested value does not violate subtarget's specifications. - if (Requested && (Requested <= getNumReservedSGPRs(ST))) + if (Requested && (Requested <= getNumReservedSGPRs(ST, MFI))) Requested = 0; // If more SGPRs are required to support the input user/system SGPRs, @@ -1283,7 +1291,8 @@ unsigned SIRegisterInfo::getMaxNumSGPRs(const MachineFunction &MF) const { if (ST.hasSGPRInitBug()) MaxNumSGPRs = SISubtarget::FIXED_SGPR_COUNT_FOR_INIT_BUG; - return std::min(MaxNumSGPRs - getNumReservedSGPRs(ST), MaxNumAddressableSGPRs); + return std::min(MaxNumSGPRs - getNumReservedSGPRs(ST, MFI), + MaxNumAddressableSGPRs); } unsigned SIRegisterInfo::getNumDebuggerReservedVGPRs( |