Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Added partselect example | Rodrigo Alejandro Melo | 2017-11-23 | 1 | -0/+30 |
| | | | | The conversion to Verilog must be fixed. | ||||
* | Allow second argument to CONVFUNC_2 to be expr | Larry Doolittle | 2017-11-22 | 1 | -1/+1 |
| | | | | | Adds one more shift/reduce conflict. Include test case. | ||||
* | Experimental support of exponentiation | Rodrigo Alejandro Melo | 2017-11-21 | 1 | -1/+8 |
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* | Adding support for while loop | Larry Doolittle | 2017-11-20 | 1 | -0/+28 |
| | | | | | Supplied by jeinstei Labelling of the loop is still unsupported. | ||||
* | Align the prototypes for dsp in dsp and genericmap | Larry Doolittle | 2017-11-20 | 2 | -4/+3 |
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* | Beginning support for assertions | Larry Doolittle | 2017-11-18 | 1 | -0/+1 |
| | | | | Based on work by jeinstei | ||||
* | Simple fix to genericmap example | Larry Doolittle | 2017-11-18 | 1 | -2/+2 |
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* | Modified the Makefile to run GHDl and iVerilog always but only if installed | Rodrigo Alejandro Melo | 2017-11-17 | 1 | -1/+3 |
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* | Added (partial) support for to_integer function | Rodrigo Alejandro Melo | 2017-11-16 | 1 | -2/+6 |
| | | | | Added an example that fail to todo.vhd. | ||||
* | Changes on genericmap due to unsupported port assignment | Rodrigo Alejandro Melo | 2017-11-16 | 2 | -5/+24 |
| | | | | This unsupported port assignament and one unsupported type of instantiation were added to todo.vhd. | ||||
* | The resulting files of the GHDL analysis were moved to temp/vhdl | Rodrigo Alejandro Melo | 2017-11-16 | 1 | -2/+5 |
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* | Added the special file examples/todo.vhd | Rodrigo Alejandro Melo | 2017-11-16 | 1 | -0/+20 |
| | | | | | | The idea is to put there things that don't work or that could be improved. Is ignored in the main Makefile when target 'translate' is used. The target 'todo' was added to the main Makefile. | ||||
* | Examples were corrected according to GHDL complains | Rodrigo Alejandro Melo | 2017-11-16 | 5 | -8/+10 |
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* | Squelch some trailing whitespace | Larry Doolittle | 2017-11-12 | 4 | -17/+16 |
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* | Rework some examples so resulting Verilog compiles | Larry Doolittle | 2017-11-10 | 4 | -7/+94 |
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* | New make target: verilogcheck | Larry Doolittle | 2017-11-10 | 2 | -0/+23 |
| | | | | | | | Requires iverilog to operate. Scans resulting files in translated_examples directory. This patch includes some simple fixes to reduce the number of errors reported, but there are more that need further investigation. | ||||
* | New rem before END PROCESS | Larry Doolittle | 2017-11-10 | 1 | -0/+32 |
| | | | | With test case! | ||||
* | Experiment with OTHERS logic | Larry Doolittle | 2017-11-09 | 1 | -0/+17 |
| | | | | | | Makes sign extension idiom work in my code base Test case added, doesn't break any others Please test on your code! | ||||
* | Fixes in examples and translated examples to avoid some complains of iVerilog | Rodrigo Alejandro Melo | 2017-02-19 | 4 | -14/+14 |
| | | | | | 'test' was repeated as entity/module name 'config' was used as port name and is a reserved word in Verilog. | ||||
* | Promoted unsupported BASED NUMBER from warning to error | Rodrigo Alejandro Melo | 2017-02-19 | 1 | -1/+1 |
| | | | | | Because the resulting verilog had the unsupported notation BASE#NUMBER#. Moreover, the 'ERROR:' string was added when an error is informed. | ||||
* | Added analysis of examples with GHDL | Rodrigo Alejandro Melo | 2017-02-14 | 13 | -33/+37 |
| | | | | | | | | Some examples were corrected according GHDL complains. Corresponding traslated_examples were modified. Use of synopsys libraries was removed. Translation of gh_fifo_async16_sr.vhd fails (complains about 'unsigned'). The problem was comented. | ||||
* | Added scientific notation supports for integers and floats | Rodrigo Alejandro Melo | 2017-02-09 | 1 | -0/+13 |
| | | | | | Also support was added for real numbers especially thinking in generics. Files called scientific.vhd and scientific.v were added for test. | ||||
* | vhd2vl-2.4 | Larry Doolittle | 2015-09-20 | 1 | -0/+3 |
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* | vhd2vl-2.3 | Larry Doolittle | 2015-09-20 | 1 | -0/+205 |
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* | vhd2vl-2.2 | Larry Doolittle | 2015-09-20 | 11 | -0/+1314 |