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* [AArch64] armv8-A doesn't have CRC.Ahmed Bougacha2017-05-031-17/+0
* Revert r294437 as it broke an asan buildbot.Amara Emerson2017-02-081-24/+24
* [AArch64][TableGen] Skip tied result operands for InstAliasAmara Emerson2017-02-081-24/+24
* AArch64: TableGenerate system instruction operands.Tim Northover2016-07-052-16/+16
* AArch64: allow MOV (imm) alias to be printedTim Northover2016-06-162-14/+14
* RAS extensions are part of ARMv8.2-A. This change enables them by introducing aSjoerd Meijer2016-06-031-0/+47
* add support for -print-imm-hex for AArch64Paul Osmialowski2016-05-134-234/+234
* [AArch64] Add ARMv8.2-A FP16 vector instructionsOliver Stannard2015-12-081-0/+382
* [AArch64] Clean up statistical profiling testOliver Stannard2015-12-041-4/+0
* [AArch64] Add ARMv8.2-A Statistical Profiling ExtensionOliver Stannard2015-12-011-0/+91
* [AArch64] Add ARMv8.2-A FP16 scalar instructionsOliver Stannard2015-11-273-0/+326
* [AArch64] Add ARMv8.2-A new AT instruction variantsOliver Stannard2015-11-261-0/+9
* [AArch64] Add ARMv8.2-A UAO PSTATE bitOliver Stannard2015-11-261-0/+19
* [AArch64] Add ARMv8.2-A persistent memory instructionOliver Stannard2015-11-261-0/+6
* [AArch64] Add ARMv8.2-A ID_A64MMFR2_EL1 registerOliver Stannard2015-11-261-0/+4
* [MC layer][AArch64] llvm-mc accepts 4-bit immediate values forAlexandros Lamprineas2015-10-051-0/+2
* [AArch64] Fix problems in decoding generic MSR instructionsPetr Pavlu2015-07-151-0/+4
* ARM]: Add support for MMFR4_EL1 in assemblerJaved Absar2015-06-081-0/+2
* AArch64: fix typo in SMIN far atomics and add testsTim Northover2015-06-021-0/+4
* [AArch64] Add v8.1a atomic instructionsVladimir Sukharev2015-06-021-0/+83
* AArch64: add BFC alias for the BFI/BFM instructions.Tim Northover2015-04-301-2/+2
* [AArch64] LORID_EL1 register must be treated as read-onlyVladimir Sukharev2015-04-201-1/+11
* [AArch64] Add v8.1a "Virtualization Host Extensions"Vladimir Sukharev2015-04-161-0/+56
* [AArch64] Add v8.1a "Limited Ordering Regions" extensionVladimir Sukharev2015-04-161-0/+28
* [AArch64] Add v8.1a "Privileged Access Never" extensionVladimir Sukharev2015-04-161-0/+10
* [AArch64] Allow non-standard INS/DUP encodingsBradley Smith2015-04-141-0/+37
* [AArch64] Add v8.1a "Rounding Double Multiply Add/Subtract" extensionVladimir Sukharev2015-03-311-0/+129
* Condition codes AL and NV are invalid in the aliases that useArtyom Skrobov2014-06-101-2/+20
* Reduce verbiage of lit.local.cfg filesAlp Toker2014-06-091-2/+1
* Restore getInvertedCondCode() from the phased-out backend, fixing disassembly...Artyom Skrobov2014-05-291-2/+4
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-2415-1/+4148
* AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.Tim Northover2014-05-241-1/+1
* TableGen/ARM64: print aliases even if they have syntax variants.Tim Northover2014-05-151-4/+2
* TableGen: use PrintMethods to print more aliasesTim Northover2014-05-121-28/+28
* AArch64/ARM64: disable test directory if ARM64 not presentTim Northover2014-05-071-1/+1
* AArch64/ARM64: implement diagnosis of unpredictable loads & storesTim Northover2014-05-061-0/+1
* AArch64/ARM64: rewrite test to use FileCheck & add ARM64 linesTim Northover2014-05-011-22/+45
* AArch64/ARM64: port basic disassembly tests to ARM64.Tim Northover2014-05-018-1145/+1153
* AArch64: print NEON lists with a space.Tim Northover2014-04-241-77/+77
* [AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.Kevin Qin2013-11-291-0/+17
* AArch64: Fix a bug about disassembling post-index load single element to 4 ve...Hao Liu2013-11-281-1/+3
* [AArch64] Add support for NEON scalar floating-point absolute difference.Chad Rosier2013-11-271-0/+8
* [AArch64] Add support for NEON scalar floating-point to integer convertChad Rosier2013-11-261-0/+99
* Fixed a bug about disassembling AArch64 post-index load/store single element ...Hao Liu2013-11-251-7/+7
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-191-0/+84
* Implement AArch64 NEON instruction set AdvSIMD (table).Jiangning Liu2013-11-141-1/+40
* [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalarChad Rosier2013-11-121-0/+213
* [AArch64] Add support for NEON scalar floating-point convert to fixed-point i...Chad Rosier2013-11-111-0/+16
* Implement AArch64 Neon instruction set Perm.Jiangning Liu2013-11-061-0/+107
* Implement AArch64 Neon instruction set Bitwise Extract.Jiangning Liu2013-11-061-0/+9
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