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| author | Tim Northover <tnorthover@apple.com> | 2016-06-16 01:42:25 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2016-06-16 01:42:25 +0000 |
| commit | daa1c018b0d52c7982854fd0a2a7ec0fb0868f27 (patch) | |
| tree | 7065d505c9295bc04feb32bd246682093c0d5992 /llvm/test/MC/Disassembler/AArch64 | |
| parent | 95e8af73957079163b981cc5d2717e205fc235df (diff) | |
| download | bcm5719-llvm-daa1c018b0d52c7982854fd0a2a7ec0fb0868f27.tar.gz bcm5719-llvm-daa1c018b0d52c7982854fd0a2a7ec0fb0868f27.zip | |
AArch64: allow MOV (imm) alias to be printed
The backend has been around for years, it's pretty ridiculous that we can't
even use the preferred form for printing "MOV" aliases. Unfortunately, TableGen
can't handle the complex predicates when printing so it's a bunch of nasty C++.
Oh well.
llvm-svn: 272865
Diffstat (limited to 'llvm/test/MC/Disassembler/AArch64')
| -rw-r--r-- | llvm/test/MC/Disassembler/AArch64/arm64-arithmetic.txt | 16 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt | 12 |
2 files changed, 14 insertions, 14 deletions
diff --git a/llvm/test/MC/Disassembler/AArch64/arm64-arithmetic.txt b/llvm/test/MC/Disassembler/AArch64/arm64-arithmetic.txt index 6ba474ff007..95b44858e84 100644 --- a/llvm/test/MC/Disassembler/AArch64/arm64-arithmetic.txt +++ b/llvm/test/MC/Disassembler/AArch64/arm64-arithmetic.txt @@ -452,20 +452,20 @@ 0x20 0x00 0xa0 0x52 0x20 0x00 0xa0 0xd2 -# CHECK: movz w0, #1 -# CHECK: movz x0, #1 -# CHECK: movz w0, #1, lsl #16 -# CHECK: movz x0, #1, lsl #16 +# CHECK: mov w0, #1 +# CHECK: mov x0, #1 +# CHECK: mov w0, #65536 +# CHECK: mov x0, #65536 0x40 0x00 0x80 0x12 0x40 0x00 0x80 0x92 0x40 0x00 0xa0 0x12 0x40 0x00 0xa0 0x92 -# CHECK: movn w0, #2 -# CHECK: movn x0, #2 -# CHECK: movn w0, #2, lsl #16 -# CHECK: movn x0, #2, lsl #16 +# CHECK: mov w0, #-3 +# CHECK: mov x0, #-3 +# CHECK: mov w0, #-131073 +# CHECK: mov x0, #-131073 0x20 0x00 0x80 0x72 0x20 0x00 0x80 0xf2 diff --git a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt index 185f0c1124a..9d6723a96e4 100644 --- a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt +++ b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt @@ -2907,8 +2907,8 @@ 0x7f 0xf0 0x1 0xf2 0xff 0xf3 0x0 0xf2 -# CHECK: orr w3, wzr, #0xf000f -# CHECK: orr x10, xzr, #0xaaaaaaaaaaaaaaaa +# CHECK: mov w3, #983055 +# CHECK: mov x10, #-6148914691236517206 0xe3 0x8f 0x0 0x32 0xea 0xf3 0x1 0xb2 @@ -2991,19 +2991,19 @@ # limitation in InstAlias. Lots of the "mov[nz]" instructions should # be "mov". -# CHECK: movz w1, #{{65535|0xffff}} +# CHECK: mov w1, #{{65535|0xffff}} # CHECK: movz w2, #0, lsl #16 -# CHECK: movn w2, #{{1234|0x4d2}} +# CHECK: mov w2, #-1235 0xe1 0xff 0x9f 0x52 0x2 0x0 0xa0 0x52 0x42 0x9a 0x80 0x12 -# CHECK: movz x2, #{{1234|0x4d2}}, lsl #32 +# CHECK: mov x2, #5299989643264 # CHECK: movk xzr, #{{4321|0x10e1}}, lsl #48 0x42 0x9a 0xc0 0xd2 0x3f 0x1c 0xe2 0xf2 -# CHECK: movz x2, #0 +# CHECK: mov x2, #0 # CHECK: movk w3, #0 # CHECK: movz x4, #0, lsl #16 # CHECK: movk w5, #0, lsl #16 |
