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authorHiroshi Inoue <inouehrs@jp.ibm.com>2018-06-13 08:54:13 +0000
committerHiroshi Inoue <inouehrs@jp.ibm.com>2018-06-13 08:54:13 +0000
commit0f7f59f0737770fbf9393e602de731a3b413e8a5 (patch)
tree58393e138c8cb71379f718a4cb0bcc9fe0af03ea /llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
parent32e611d1a98ca59a77850e06df8b54bb6c582334 (diff)
downloadbcm5719-llvm-0f7f59f0737770fbf9393e602de731a3b413e8a5.tar.gz
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[PowerPC] fix trivial typos in comment, NFC
llvm-svn: 334583
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrInfo.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index c095ccbc1ee..655114b07f1 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -1608,7 +1608,7 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
int OpC = CmpInstr.getOpcode();
unsigned CRReg = CmpInstr.getOperand(0).getReg();
- // FP record forms set CR1 based on the execption status bits, not a
+ // FP record forms set CR1 based on the exception status bits, not a
// comparison with zero.
if (OpC == PPC::FCMPUS || OpC == PPC::FCMPUD)
return false;
@@ -1731,7 +1731,7 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
unsigned PredHint = PPC::getPredicateHint(Pred);
int16_t Immed = (int16_t)Value;
- // When modyfing the condition in the predicate, we propagate hint bits
+ // When modifying the condition in the predicate, we propagate hint bits
// from the original predicate to the new one.
if (Immed == -1 && PredCond == PPC::PRED_GT)
// We convert "greater than -1" into "greater than or equal to 0",
@@ -2233,7 +2233,7 @@ MachineInstr *PPCInstrInfo::getConstantDefMI(MachineInstr &MI,
MachineInstr *DefMI = nullptr;
MachineRegisterInfo *MRI = &MI.getParent()->getParent()->getRegInfo();
const TargetRegisterInfo *TRI = &getRegisterInfo();
- // If we'ere in SSA, get the defs through the MRI. Otherwise, only look
+ // If we're in SSA, get the defs through the MRI. Otherwise, only look
// within the basic block to see if the register is defined using an LI/LI8.
if (MRI->isSSA()) {
for (int i = 1, e = MI.getNumOperands(); i < e; i++) {
@@ -3185,7 +3185,7 @@ bool PPCInstrInfo::isTOCSaveMI(const MachineInstr &MI) const {
}
// We limit the max depth to track incoming values of PHIs or binary ops
-// (e.g. AND) to avoid exsessive cost.
+// (e.g. AND) to avoid excessive cost.
const unsigned MAX_DEPTH = 1;
bool
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