summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
diff options
context:
space:
mode:
authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>2017-12-15 14:17:45 +0000
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>2017-12-15 14:17:45 +0000
commit6ab32dea12d0a733a0222ca8980352702e7233dc (patch)
treea6fef15c29dc1ffbb4979755b1f49a17fc49890b /llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
parente662fa375267cfdbc254802666a9bcc06948d372 (diff)
downloadbcm5719-llvm-6ab32dea12d0a733a0222ca8980352702e7233dc.tar.gz
bcm5719-llvm-6ab32dea12d0a733a0222ca8980352702e7233dc.zip
Fix the second build bot break introduced by r320791.
llvm-svn: 320811
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrInfo.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 879bb4c797e..031e6689f18 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -2286,6 +2286,13 @@ MachineInstr *PPCInstrInfo::getConstantDefMI(MachineInstr &MI,
MachineBasicBlock::reverse_iterator E = MI.getParent()->rend(), It = MI;
It++;
unsigned Reg = MI.getOperand(i).getReg();
+ // MachineInstr::readsRegister only returns true if the machine
+ // instruction reads the exact register or its super-register. It
+ // does not consider uses of sub-registers which seems like strange
+ // behaviour. Nonetheless, if we end up with a 64-bit register here,
+ // get the corresponding 32-bit register to check.
+ if (PPC::G8RCRegClass.contains(Reg))
+ Reg = Reg - PPC::X0 + PPC::R0;
// Is this register defined by a load-immediate in this block?
for ( ; It != E; ++It) {
OpenPOWER on IntegriCloud