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authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>2017-05-31 05:40:25 +0000
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>2017-05-31 05:40:25 +0000
commite597bd8230bb2ab8668e97e44a47c8311df63e04 (patch)
tree1286f0d9a2165cbb5f7275a83081fce76c75efa6 /llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
parent16942c2cb2551ea5337d4f968fbad718e2da7752 (diff)
downloadbcm5719-llvm-e597bd8230bb2ab8668e97e44a47c8311df63e04.tar.gz
bcm5719-llvm-e597bd8230bb2ab8668e97e44a47c8311df63e04.zip
[PowerPC] Eliminate integer compare instructions - vol. 2
This patch builds upon https://reviews.llvm.org/rL302810 to add handling for bitwise logical operations in general purpose registers. The idea is to keep the values in GPRs as long as possible - only extracting them to a condition register bit when no further operations are to be done. Differential Revision: https://reviews.llvm.org/D31851 llvm-svn: 304282
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrInfo.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index fd6785e963a..f3c68c443b1 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -1983,3 +1983,7 @@ PPCInstrInfo::updatedRC(const TargetRegisterClass *RC) const {
return &PPC::VSRCRegClass;
return RC;
}
+
+int PPCInstrInfo::getRecordFormOpcode(unsigned Opcode) {
+ return PPC::getRecordFormOpcode(Opcode);
+}
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