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path: root/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
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* [PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st.Tony Jiang2017-11-201-23/+84
* [PowerPC] Use record-form instruction for Less-or-Equal -1 and Greater-or-Equ...Hiroshi Inoue2017-10-261-30/+39
* [PowerPC] Use helper functions to check sign-/zero-extended valueHiroshi Inoue2017-10-181-23/+11
* [PowerPC] fix up in sign-/zero-extension eliminationHiroshi Inoue2017-10-161-0/+2
* [PowerPC] Eliminate sign- and zero-extensions if already sign- or zero-extendedHiroshi Inoue2017-10-161-0/+239
* [PowerPC] Utilize DQ-Form instructions for spill/restore and fix FrameIndex e...Lei Huang2017-10-111-4/+4
* [PowerPC] eliminate unconditional branch to the next instructionHiroshi Inoue2017-09-271-0/+14
* [Power9] Spill gprs to vector registers rather than stackZaara Syeda2017-09-211-1/+70
* [PowerPC] enable optimizeCompareInstr for branch with static branch hintHiroshi Inoue2017-07-271-7/+15
* fix formatting issue; NFCHiroshi Inoue2017-07-181-4/+6
* [PowerPC] define target hook isReallyTriviallyReMaterializable()Lei Huang2017-06-211-0/+23
* [PowerPC] fix potential verification errors on CFENCE8Hiroshi Inoue2017-06-151-1/+1
* [PowerPC] Eliminate integer compare instructions - vol. 2Nemanja Ivanovic2017-05-311-0/+4
* [PPC] Fix assertion failure during binary encoding with -mcpu=pwr9Hiroshi Inoue2017-05-291-0/+2
* SummaryHiroshi Inoue2017-05-211-6/+44
* [PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync.Tim Shen2017-05-161-0/+13
* Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-2/+2
* Revert r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-2/+2
* X86: Don't emit zero-byte functions on WindowsHans Wennborg2017-04-211-2/+2
* Remove an oddly unnecessary temporary.Eric Christopher2017-03-271-2/+1
* Make TargetInstrInfo::isPredicable take a const reference, NFCKrzysztof Parzyszek2017-03-031-1/+1
* [XRay] Implement powerpc64le xray.Tim Shen2017-02-101-1/+3
* [PowerPC] Expand ISEL instruction into if-then-else sequence.Tony Jiang2017-01-161-6/+0
* Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence."Tony Jiang2017-01-161-0/+6
* [PowerPC] Expand ISEL instruction into if-then-else sequence.Tony Jiang2017-01-161-6/+0
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-6/+10
* [Power9] Exploit D-Form VSX Scalar memory ops that target full VSX register setNemanja Ivanovic2016-10-041-6/+45
* [Power9] Part-word VSX integer scalar loads/stores and sign extend instructionsNemanja Ivanovic2016-10-041-18/+26
* [Power9] Add exploitation of non-permuting memory opsNemanja Ivanovic2016-09-221-2/+6
* Finish renaming remaining analyzeBranch functionsMatt Arsenault2016-09-141-2/+2
* Make analyzeBranch family of instruction names consistentMatt Arsenault2016-09-141-2/+2
* AArch64: Use TTI branch functions in branch relaxationMatt Arsenault2016-09-141-2/+7
* [stackmaps] More extraction of common code [NFCI]Philip Reames2016-08-231-2/+3
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-2/+2
* TargetInstrInfo: rename GetInstSizeInBytes to getInstSizeInBytes. NFCSjoerd Meijer2016-07-281-1/+1
* PowerPC: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-271-67/+66
* Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar2016-07-151-1/+2
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-104/+99
* Drop support for creating $stubs.Rafael Espindola2016-06-291-1/+1
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-17/+17
* [PPC64] Fix SUBFC8 Defs listKeno Fischer2016-06-011-0/+2
* [Power9] Add support for -mcpu=pwr9 in the back endNemanja Ivanovic2016-05-091-0/+4
* [PowerPC] [SSP] Fix stack guard load for 32-bit.Marcin Koscielnicki2016-04-211-1/+1
* [PPC, SSP] Support PowerPC Linux stack protection.Tim Shen2016-04-191-0/+16
* [PPC64] Mark CR0 Live if PPCInstrInfo::optimizeCompareInstr Creates a Use of CR0Chuang-Yu Cheng2016-04-121-0/+4
* Codegen: [PPC] Word Rotates are Zero Extending.Kyle Butt2016-03-231-1/+8
* CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith2016-02-231-64/+61
* Remove uses of builtin comma operator.Richard Trieu2016-02-181-6/+6
* Codegen: [PPC] Silence false-positive initialization warning. NFCKyle Butt2016-01-151-2/+2
* Codegen: [PPC] Handle weighted comparisons when inserting selects.Kyle Butt2016-01-121-10/+33
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