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path: root/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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* [PowerPC] Enhance the selection(ISD::VSELECT) of vector typeZi Xuan Wu2018-11-141-7/+1
* Fix clang -Wimplicit-fallthrough warnings across llvm, NFCReid Kleckner2018-11-011-2/+2
* [PowerPC] Support constraint 'wi' in asmLi Jia He2018-11-011-2/+6
* [PowerPC] Fix some missed optimization opportunities in combineSetCCLi Jia He2018-10-261-0/+34
* [PowerPC] Keep vector int to fp conversions in vector domainNemanja Ivanovic2018-10-261-0/+68
* [Power9] Add __float128 support in the backend for bitcast to a i128Stefan Pintilie2018-10-231-0/+58
* [PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when type is v2i16 and v2i8QingShan Zhang2018-10-101-32/+0
* [PowerPC] Implement hasBitPreservingFPLogic for types that can be supportedNemanja Ivanovic2018-10-091-0/+9
* [PowerPC] Fix the assert of combineBVOfConsecutiveLoads when element num is 1QingShan Zhang2018-09-201-1/+2
* [PowerPC] Fix label address calculation for ppc64Strahinja Petrovic2018-09-171-1/+2
* [PowerPC] Fix the calling convention for i1 arguments on PPC32Lion Yang2018-09-141-5/+15
* [PowerPC] Combine ADD to ADDZEQingShan Zhang2018-09-071-0/+97
* [PowerPC] Revert commit r339779Nemanja Ivanovic2018-08-271-3/+7
* [PowerPC] Recommit r340016 after fixing the reported issueNemanja Ivanovic2018-08-271-1/+25
* Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift ...Eric Christopher2018-08-211-25/+1
* [PowerPC] Generate lxsd instead of the ld->mtvsrd sequence for vector loadsStefan Pintilie2018-08-171-0/+29
* [PowerPC] Generate Power9 extswsli extend sign and shift immediate instructionNemanja Ivanovic2018-08-171-1/+25
* [MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth2018-08-161-24/+14
* [PowerPC] Enhance the selection(ISD::VSELECT) of vector typeNemanja Ivanovic2018-08-151-7/+3
* [PowerPC] Don't run BV DAG Combine before legalization if it assumes legal typesNemanja Ivanovic2018-08-151-3/+10
* [PowerPC] Improve codegen for vector loads using scalar_to_vectorZaara Syeda2018-08-081-11/+0
* [PowerPC] Do not round values prior to converting to integerNemanja Ivanovic2018-08-021-3/+19
* [DAGCombiner][TargetLowering] Pass a SmallVector instead of a std::vector to ...Craig Topper2018-07-301-2/+2
* [DAGCombiner][PowerPC][AArch64] Pass Created vector by reference to BuildSDIV...Craig Topper2018-07-301-5/+3
* DAG: Add calling convention argument to calling convention funcsMatt Arsenault2018-07-281-0/+2
* Fix build failures from r337347, found by clangJustin Hibbits2018-07-181-6/+0
* Introduce codegen for the Signal Processing EngineJustin Hibbits2018-07-181-24/+93
* Add PowerPC e500(v2) core scheduler and directives.Justin Hibbits2018-07-181-0/+2
* [Power9] Add __float128 builtins for Rounding OperationsStefan Pintilie2018-07-091-0/+8
* [Power9] Add __float128 support for compare operationsStefan Pintilie2018-07-091-0/+10
* [Power9] Add __float128 library call for fremStefan Pintilie2018-07-061-0/+2
* [Power9] Add lib calls for float128 operations with no equivalent PPC instruc...Lei Huang2018-07-051-0/+19
* [Power9] Ensure float128 in non-homogenous aggregates are passed via VSX regLei Huang2018-07-051-0/+21
* [Power9]Legalize and emit code for quad-precision convert from single-precisionLei Huang2018-07-051-0/+3
* [Power9] Implement float128 parameter passing and return valuesLei Huang2018-07-051-3/+8
* [Power9]Legalize and emit code for round & convert quad-precision valuesLei Huang2018-07-041-0/+4
* [PowerPC] Fix label address calculation for ppc32Strahinja Petrovic2018-06-191-3/+4
* [PowerPC] fix trivial typos in comment, NFCHiroshi Inoue2018-06-131-2/+2
* Set ADDE/ADDC/SUBE/SUBC to expand by defaultAmaury Sechet2018-06-011-0/+9
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-9/+9
* [Power9]Legalize and emit code for truncate and convert QP to DWLei Huang2018-05-081-0/+5
* [PowerPC] Unify handling for conversion of FP_TO_INT feeding a storeLei Huang2018-05-081-52/+77
* Commit r331416 breaks the big-endian PPC bot. On the big endian build, weNemanja Ivanovic2018-05-031-0/+3
* [PowerPC] Implement isMaskAndCmp0FoldingBeneficialNemanja Ivanovic2018-05-021-0/+14
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-8/+8
* [NFC] Move verificaiton check for f128 conversion into LowerINT_TO_FP()Lei Huang2018-04-161-24/+14
* [Power9]Legalize and emit code for converting (Un)Signed DWord to Quad-PrecisionLei Huang2018-04-121-1/+6
* [Power9]Legalize and emit code for quad-precision fma instructionsLei Huang2018-04-041-0/+3
* [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to Code...Craig Topper2018-03-291-1/+1
* [Power9]Legalize and emit code for quad-precision convert from double-precisionLei Huang2018-03-261-5/+12
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