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| author | Craig Topper <craig.topper@intel.com> | 2018-07-30 21:04:34 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-07-30 21:04:34 +0000 |
| commit | a568a27dfa450d42452cb348482924da25e934c9 (patch) | |
| tree | e54aa453cc28c0d97896a9896f589369cc04d9da /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | f50288c236a66d280465d49c04f67fe89d6f5517 (diff) | |
| download | bcm5719-llvm-a568a27dfa450d42452cb348482924da25e934c9.tar.gz bcm5719-llvm-a568a27dfa450d42452cb348482924da25e934c9.zip | |
[DAGCombiner][PowerPC][AArch64] Pass Created vector by reference to BuildSDIVPow2.
llvm-svn: 338303
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 140d6ed25ee..b58152a9c18 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -13105,7 +13105,7 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N, SDValue PPCTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor, SelectionDAG &DAG, - std::vector<SDNode *> *Created) const { + std::vector<SDNode *> &Created) const { // fold (sdiv X, pow2) EVT VT = N->getValueType(0); if (VT == MVT::i64 && !Subtarget.isPPC64()) @@ -13122,13 +13122,11 @@ PPCTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor, SDValue ShiftAmt = DAG.getConstant(Lg2, DL, VT); SDValue Op = DAG.getNode(PPCISD::SRA_ADDZE, DL, VT, N0, ShiftAmt); - if (Created) - Created->push_back(Op.getNode()); + Created.push_back(Op.getNode()); if (IsNegPow2) { Op = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), Op); - if (Created) - Created->push_back(Op.getNode()); + Created.push_back(Op.getNode()); } return Op; |
