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path: root/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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* [AArch64] Improve code generation for logical instructions takingAkira Hatanaka2017-04-211-1/+1
* Revert r300932 and r300930.Akira Hatanaka2017-04-211-1/+1
* [AArch64] Improve code generation for logical instructions takingAkira Hatanaka2017-04-211-1/+1
* AMDGPU: Custom lower illegal small select typesMatt Arsenault2017-04-191-0/+29
* AMDGPU: Fix invalid copies when copying i1 to phys regMatt Arsenault2017-04-121-2/+28
* AMDGPU: Refactor SIMachineFunctionInfo slightlyMatt Arsenault2017-04-111-1/+1
* AMDGPU: Refactor argument loweringMatt Arsenault2017-04-111-256/+318
* AMDGPU/GFX9: Fix shared and private aperture queriesKonstantin Zhuravlyov2017-04-061-11/+23
* AMDGPU: Replace fp16SrcZerosHighBits with a whitelistMatt Arsenault2017-04-061-4/+50
* AMDGPU: Stop using CCAssignToRegWithShadowMatt Arsenault2017-04-061-11/+0
* [AMDGPU] Eliminate barrier if workgroup size is not greater than wavefront sizeStanislav Mekhanoshin2017-04-061-0/+11
* AMDGPU: Remove legacy export intrinsicMatt Arsenault2017-04-041-23/+0
* AMDGPU: Remove llvm.SI.vs.load.inputMatt Arsenault2017-04-031-5/+0
* AMDGPU: Remove legacy bfe intrinsicsMatt Arsenault2017-04-031-3/+7
* AMDGPU: Remove unnecessary ands when f16 is legalMatt Arsenault2017-03-311-0/+39
* AMDGPU: Add all atomicrmw fields to atomic.inc/decMatt Arsenault2017-03-301-2/+5
* [AMDGPU] Get address space mapping by target triple environmentYaxun Liu2017-03-271-75/+72
* AMDGPU: Implement f16 froundMatt Arsenault2017-03-241-0/+1
* AMDGPU: Rename SI_RETURNMatt Arsenault2017-03-211-1/+1
* AMDGPU: Always use VGPR indexing on GFX9Marek Olsak2017-03-211-2/+2
* AMDGPU: Fix asserting on 0 dmask for image intrinsicsMatt Arsenault2017-03-211-0/+58
* AMDGPU: Cleanup control flow intrinsicsMatt Arsenault2017-03-171-25/+18
* AMDGPU: Allow sinking of addressing modes for atomic_inc/decMatt Arsenault2017-03-151-5/+22
* AMDGPU: Re-use TM.getNullPointerValueMatt Arsenault2017-03-131-10/+8
* AMDGPU: Treat 0 as private null pointer in addrspacecast loweringMatt Arsenault2017-03-131-7/+14
* AMDGPU: Remove packf16 intrinsicMatt Arsenault2017-03-111-5/+0
* AMDGPU: Use v_med3_{f16|i16|u16}Matt Arsenault2017-02-271-17/+16
* AMDGPU: Support v2i16/v2f16 packed operationsMatt Arsenault2017-02-271-6/+69
* AMDGPU: Support inlineasm for packed instructionsMatt Arsenault2017-02-271-1/+42
* AMDGPU: Use clamp with f64Matt Arsenault2017-02-221-5/+8
* AMDGPU : Update TrapCode based on Trap Handler ABI.Wei Ding2017-02-221-2/+2
* AMDGPU: Add replacement bfe intrinsicsMatt Arsenault2017-02-221-0/+6
* AMDGPU: Don't look at chain users when adjusting writemaskMatt Arsenault2017-02-221-0/+4
* Revert "AMDGPU : Update TrapCode based on Trap Handler ABI."Wei Ding2017-02-221-1/+1
* AMDGPU : Update TrapCode based on Trap Handler ABI.Wei Ding2017-02-221-1/+1
* AMDGPU: Add cvt.pkrtz intrinsicMatt Arsenault2017-02-221-4/+41
* AMDGPU: Redefine clamp node as clamp 0.0-1.0Matt Arsenault2017-02-211-3/+77
* AMDGPU: Formatting fixesMatt Arsenault2017-02-211-4/+5
* AMDGPU: Remove llvm.AMDGPU.flbit intrinsicMatt Arsenault2017-02-211-1/+0
* AMDGPU: Don't use stack space for SGPR->VGPR spillsMatt Arsenault2017-02-211-0/+2
* AMDGPU: Merge initial gfx9 supportMatt Arsenault2017-02-181-1/+8
* AMDGPU: Fix crashes on invalid icmp/fcmp intrinsicsMatt Arsenault2017-02-171-5/+9
* AMDGPU: Remove llvm.AMDGPU.rsq intrinsicMatt Arsenault2017-02-161-1/+0
* AMDGPU: Remove llvm.SI.sendmsgMatt Arsenault2017-02-161-4/+3
* AMDGPU: Remove SI_fs_constant and SI_fs_interp intrinsicsMatt Arsenault2017-02-161-25/+0
* AMDGPU: Consolidate sendmsg/sendmsghalt handling and testsMatt Arsenault2017-02-151-7/+4
* AMDGPU: Fix trailing whitespaceMatt Arsenault2017-02-101-6/+5
* AMDGPU : Add trap handler support.Wei Ding2017-02-101-18/+41
* AMDGPU: Generalize matching of v_med3_f32Matt Arsenault2017-01-311-0/+3
* AMDGPU: Make i32 uaddo/usubo legalMatt Arsenault2017-01-301-0/+3
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