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* [NFC] Fix missing testfile change of rL350299Diogo N. Sampaio2019-01-031-2/+2
* [ARM] Add command-line option for SBDiogo N. Sampaio2019-01-032-9/+9
* [ARM][v8.5A] Add speculation barriers SSBB and PSSBBOliver Stannard2018-09-282-4/+4
* [ARM][v8.5A] Add speculation barrier to ARM & Thumb instruction setsOliver Stannard2018-09-272-0/+18
* [ARM/AArch64] Support FP16 +fp16fml instructionsBernard Ogden2018-08-172-0/+146
* [AArch64][ARM] Armv8.4-A: Trace synchronization barrier instructionSjoerd Meijer2018-07-062-0/+20
* ARM: correctly decode VFP instructions following unpredictable t2ITTim Northover2018-06-261-6/+6
* [ARM]Decoding MSR with unpredictable destination register causes an assertSimi Pallipurath2018-03-061-4/+4
* [ARM] Re-commit r324600 with fixed LLVMBuild.txtOliver Stannard2018-02-082-2/+33
* Revert r324600 as it breaks a buildbotOliver Stannard2018-02-082-33/+2
* [ARM] Fix disassembly of invalid banked register movesOliver Stannard2018-02-082-2/+33
* [ARM][AArch64] Add CSDB speculation barrier instructionOliver Stannard2018-02-062-0/+8
* [ARM] Add support for unpredictable MVN instructions.Yvan Roux2018-02-011-0/+38
* [ARM] Armv8-R DFB instructionSam Parker2017-12-212-0/+12
* [ARM] Fix disassembly for conditional VMRS and VMSR instructions in ARM modeAndre Vieira2017-10-182-0/+85
* [ARM] v8.3-a complex number supportSam Parker2017-09-292-0/+132
* [ARM] Fix assembly and disassembly for VMRS/VMSRAndre Vieira2017-09-222-0/+183
* [ARM][AArch64] v8.3-A Javascript ConversionSam Parker2017-08-222-0/+20
* [ARM] Assembler support for the ARMv8.2a dot product instructionsSjoerd Meijer2017-08-112-0/+62
* Revert "[ARM] Fix assembly and disassembly for VMRS/VMSR"Tim Northover2017-08-083-183/+8
* [ARM] Fix assembly and disassembly for VMRS/VMSRAndre Vieira2017-08-073-8/+183
* [ARM] Saturation instructions are DSP-onlyRenato Golin2016-07-251-1/+1
* RAS extensions are part of ARMv8.2-A. This change enables them by introducing aSjoerd Meijer2016-06-032-0/+12
* [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.Mandeep Singh Grang2016-04-191-1/+1
* [ARM] Add new system registers to ARMv8-M Baseline/MainlineBradley Smith2016-01-251-0/+25
* [ARM] Add ARMv8.2-A FP16 scalar instructionsOliver Stannard2016-01-254-0/+746
* # This is a combination of 2 commits.Reid Kleckner2016-01-151-25/+0
* [ARM] Add new system registers to ARMv8-M Baseline/MainlineBradley Smith2016-01-151-0/+25
* Revert "[ARM] Add ARMv8.2-A FP16 scalar instructions"Reid Kleckner2015-12-164-746/+0
* [ARM] Add ARMv8.2-A FP16 vector instructionsOliver Stannard2015-12-164-0/+1166
* [ARM] Add ARMv8.2-A FP16 scalar instructionsOliver Stannard2015-12-164-0/+746
* [ARM] Allow SP in rGPR, starting from ARMv8Artyom Skrobov2015-10-282-6/+27
* [ARM] Add v8.1a "Privileged Access Never" extensionVladimir Sukharev2015-04-162-0/+28
* [ARM] Fix some non-portable shell syntax in r233301's testsJustin Bogner2015-03-261-2/+2
* [ARM] Add v8.1a "Rounding Double Multiply Add/Subtract" extensionVladimir Sukharev2015-03-264-0/+289
* Add a bunch of CHECK missing colons in tests. NFC.Ahmed Bougacha2015-03-141-3/+3
* Add support for ARM modified-immediate assembly syntax.Asiri Rathnayake2014-12-022-3/+109
* Add post-decode checking of HVC instruction.Charlie Turner2014-12-011-0/+10
* Add Thumb HVC and ERET virtualisation extension instructions.Charlie Turner2014-12-011-0/+61
* Add ARM ERET and HVC virtualisation extension instructions.Charlie Turner2014-12-011-0/+41
* Fix wrong encoding of MRSBanked.Charlie Turner2014-11-281-33/+33
* Fix bashism in tests added by r221341Oliver Stannard2014-11-051-2/+2
* [ARM] Honor FeatureD16 in the assembler and disassemblerOliver Stannard2014-11-051-0/+23
* Remove the cortex-a9-mp CPU.Charlie Turner2014-11-032-2/+2
* [Thumb2] Improve disassembly of memory hintsOliver Stannard2014-10-231-0/+69
* Thumb2 M-class MSR instruction support changesRenato Golin2014-09-012-13/+14
* ARM: implement MRS/MSR (banked reg) system instructions.Tim Northover2014-08-152-0/+303
* Allow only disassembling of M-class MSR masks that the assembler knows how to...James Molloy2014-08-012-4/+125
* ARM: honor hex immediate formatting for ldr/str i12 offsets.Jim Grosbach2014-06-111-0/+6
* llvm-mc: Add option for prefering hex format disassembly.Jim Grosbach2014-06-111-1/+1
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