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* [AMDGPU] Remove duplicate gfx10 assembler and disassembler testsJay Foad2020-01-141-5154/+0
| | | | | | | | | | | | Summary: Depends on D72611. Reviewers: rampitec, arsenm Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72616
* [AMDGPU] Improve error checking in gfx10 assembler testsJay Foad2020-01-141-3/+12836
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This adds checks that the expected error was actually reported against the correct instruction, and fixes a couple of problems that that showed up: one incorrect W32-ERR: v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD // W64: encoding: [0xf9,0x04,0x1e,0x7d,0x01,0x00,0x06,0x06] -// W32-ERR: error: invalid operand for instruction +// W32-ERR: error: {{instruction not supported on this GPU|invalid operand for instruction}} and one missing W32-ERR: v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD // W64: encoding: [0xf9,0x04,0x1e,0x7d,0x01,0x86,0x06,0x06] +// W32-ERR: error: invalid operand for instruction Reviewers: rampitec, arsenm Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72611
* [AMDGPU] Add gfx9 assembler and disassembler test casesJay Foad2020-01-141-0/+1044
| | | | | | | | | | | | | | Summary: This adds assembler tests for cases that were previously only in the disassembler tests, and vice versa. Reviewers: rampitec, arsenm, nhaehnle Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72592
* [AMDGPU] Add gfx8 assembler and disassembler test casesJay Foad2020-01-121-0/+159
| | | | | | | | | | | | | | Summary: This adds assembler tests for cases that were previously only in the disassembler tests, and vice versa. Reviewers: rampitec, arsenm, nhaehnle Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72561
* [AMDGPU][MC][GFX10] Enabled v_movrel*[sdwa|dpp|dpp8] opcodesDmitry Preobrazhensky2019-11-183-2/+113
| | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43712 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D70170
* [AMDGPU][MC] Corrected src0 for v_movrelsd_b32 and v_movrelsd_2_b32Dmitry Preobrazhensky2019-11-082-0/+10
| | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=40903 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D69888
* [AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64Dmitry Preobrazhensky2019-10-281-0/+132
| | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43747 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D69348
* [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32Dmitry Preobrazhensky2019-10-182-0/+44
| | | | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43608 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D69096 llvm-svn: 375241
* [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwaDmitry Preobrazhensky2019-10-181-0/+5
| | | | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43607 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D69095 llvm-svn: 375231
* [AMDGPU][MC][GFX9][GFX10] Corrected number of src operands for ↵Dmitry Preobrazhensky2019-10-113-34/+34
| | | | | | | | | | | | ds_[read/write]_addtid_b32 See https://bugs.llvm.org/show_bug.cgi?id=37941 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68787 llvm-svn: 374561
* [AMDGPU][MC][GFX6][GFX7][GFX10] Added instructions ↵Dmitry Preobrazhensky2019-10-112-0/+92
| | | | | | | | | | | | buffer_atomic_[fcmpswap/fmin/fmax]* See https://bugs.llvm.org/show_bug.cgi?id=28232 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68788 llvm-svn: 374559
* [AMDGPU][MC][GFX10] Enabled null for 64-bit dst operandsDmitry Preobrazhensky2019-10-113-1/+17
| | | | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43524 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68785 llvm-svn: 374557
* [AMDGPU][MC] Corrected parsing of optional operandsDmitry Preobrazhensky2019-10-111-0/+5
| | | | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43486 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D68350 llvm-svn: 374553
* [AMDGPU][MC][GFX10] Corrected definition of FLAT GLOBAL/SCRATCH instructionsDmitry Preobrazhensky2019-10-041-0/+20
| | | | | | | | | | See bug 43483: https://bugs.llvm.org/show_bug.cgi?id=43483 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68347 llvm-svn: 373736
* [AMDGPU][MC] Corrected parsing of registersDmitry Preobrazhensky2019-09-271-0/+9
| | | | | | | | | | | | | Summary of changes: refactored code for better readability and future improvements; fixed bug 41281: https://bugs.llvm.org/show_bug.cgi?id=41281 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D65224 llvm-svn: 373094
* [AMDGPU][MC] Corrected handling of relocatable expressionsDmitry Preobrazhensky2019-09-232-1/+42
| | | | | | | | | | See bug 43359: https://bugs.llvm.org//show_bug.cgi?id=43359 Reviewers: rampitec Differential Revision: https://reviews.llvm.org/D67829 llvm-svn: 372622
* [AMDGPU][MC][GFX10] Corrected constant bus checks to exclude nullDmitry Preobrazhensky2019-09-021-0/+6
| | | | | | | | | | See AMD SWDEV-157286 Reviewers: atamazov, arsenm Differential Revision: https://reviews.llvm.org/D65229 llvm-svn: 370665
* [AMDGPU][MC][GFX10] Enabled null with 64-bit operandsDmitry Preobrazhensky2019-09-021-0/+8
| | | | | | | | | | See Bug 42745: https://bugs.llvm.org/show_bug.cgi?id=42745 Reviewers: atamazov, arsenm https://reviews.llvm.org/D65231 llvm-svn: 370660
* [AMDGPU][MC][GFX10] Corrected constant bus limit for 64-bit shift instructionsDmitry Preobrazhensky2019-09-022-5/+13
| | | | | | | | | | See bug 42744: https://bugs.llvm.org/show_bug.cgi?id=42744 Reviewers: atamazov, arsenm Differential Revision: https://reviews.llvm.org/D65228 llvm-svn: 370652
* [AMDGPU] Fix bug when calculating user_spgr_count for Code Object V3 assemblerScott Linder2019-08-281-1/+28
| | | | | | | | Stop counting explicitly disabled user_spgr's in the user_sgpr_count field of the kernel descriptor. Differential Revision: https://reviews.llvm.org/D66900 llvm-svn: 370250
* [AMDGPU] Check for immediate SrcC in mfma in AsmParserStanislav Mekhanoshin2019-08-232-480/+477
| | | | | | Differential Revision: https://reviews.llvm.org/D66674 llvm-svn: 369819
* [AMDGPU][MC][GFX10] Enabled GFX10 assembly with arbitrary wavesize assumed ↵Dmitry Preobrazhensky2019-07-241-0/+238
| | | | | | | | | | by the code Reviewers: rampitec, arsenm Differential Revision: https://reviews.llvm.org/D65216 llvm-svn: 366921
* [AMDGPU] Add all vgpr classes to asm parserStanislav Mekhanoshin2019-07-242-2/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D65158 llvm-svn: 366917
* [AMDGPU][MC] Corrected parsing of branch offsetsDmitry Preobrazhensky2019-07-194-3/+40
| | | | | | | | | | See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D64629 llvm-svn: 366571
* [AMDGPU][MC][GFX9][GFX10] Added support of GET_DOORBELL messageDmitry Preobrazhensky2019-07-152-1/+28
| | | | | | | | Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D64729 llvm-svn: 366071
* [AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructionsDmitry Preobrazhensky2019-07-156-66/+66
| | | | | | | | | | See bug 42599: https://bugs.llvm.org/show_bug.cgi?id=42599 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D64716 llvm-svn: 366067
* [AMDGPU] gfx908 atomic fadd and atomic pk_faddStanislav Mekhanoshin2019-07-111-0/+110
| | | | | | Differential Revision: https://reviews.llvm.org/D64435 llvm-svn: 365717
* [AMDGPU] gfx908 dot instruction supportStanislav Mekhanoshin2019-07-113-170/+584
| | | | | | Differential Revision: https://reviews.llvm.org/D64431 llvm-svn: 365715
* [AMDGPU] gfx908 v_pk_fmac_f16 supportStanislav Mekhanoshin2019-07-091-0/+46
| | | | | | Differential Revision: https://reviews.llvm.org/D64433 llvm-svn: 365573
* [AMDGPU] gfx908 mAI instructions, MC partStanislav Mekhanoshin2019-07-093-0/+1045
| | | | | | Differential Revision: https://reviews.llvm.org/D64446 llvm-svn: 365563
* [AMDGPU] gfx908 targetStanislav Mekhanoshin2019-07-091-0/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D64429 llvm-svn: 365525
* [AMDGPU][MC] Corrected parsing of FLAT offset modifierDmitry Preobrazhensky2019-07-084-31/+33
| | | | | | | | | | | | | | Summary of changes: - simplified handling of FLAT offset: offset_s13 and offset_u12 have been replaced with flat_offset; - provided information about error position for pre-gfx9 targets; - improved errors handling. Reviewers: artem.tamazov, arsenm, rampitec Differential Revision: https://reviews.llvm.org/D64244 llvm-svn: 365321
* [AMDGPU][MC] Enabled constant expressions as operands of sendmsgDmitry Preobrazhensky2019-06-282-51/+178
| | | | | | | | | | See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D62735 llvm-svn: 364645
* [AMDGPU] Fix for branch offset hardware workaroundRyan Taylor2019-06-263-0/+270
| | | | | | | | | | | | | | | | | | | Summary: This fixes a hardware bug that makes a branch offset of 0x3f unsafe. This replaces the 32 bit branch with offset 0x3f to a 64 bit instruction that includes the same 32 bit branch and the encoding for a s_nop 0 to follow. The relaxer than modifies the offsets accordingly. Change-Id: I10b7aed99d651f8159401b01bb421f105fa6288e Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63494 llvm-svn: 364451
* AMDGPU/MC: Add .amdgpu_lds directiveNicolai Haehnle2019-06-252-0/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The directive defines a symbol as an group/local memory (LDS) symbol. LDS symbols behave similar to common symbols for the purposes of ELF, using the processor-specific SHN_AMDGPU_LDS as section index. It is the linker and/or runtime loader's job to "instantiate" LDS symbols and resolve relocations that reference them. It is not possible to initialize LDS memory (not even zero-initialize as for .bss). We want to be able to link together objects -- starting with relocatable objects, but possible expanding to shared objects in the future -- that access LDS memory in a flexible way. LDS memory is in an address space that is entirely separate from the address space that contains the program image (code and normal data), so having program segments for it doesn't really make sense. Furthermore, we want to be able to compile multiple kernels in a compilation unit which have disjoint use of LDS memory. In that case, we may want to place LDS symbols differently for different kernels to save memory (LDS memory is very limited and physically private to each kernel invocation), so we can't simply place LDS symbols in a .lds section. Hence this solution where LDS symbols always stay undefined. Change-Id: I08cbc37a7c0c32f53f7b6123aa0afc91dbc1748f Reviewers: arsenm, rampitec, t-tye, b-sumner, jsjodin Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, rupprecht, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61493 llvm-svn: 364296
* [AMDGPU] gfx10 tests. NFC.Stanislav Mekhanoshin2019-06-206-0/+132703
| | | | llvm-svn: 363946
* [AMDGPU] gfx1010 core wave32 changesStanislav Mekhanoshin2019-06-202-0/+422
| | | | | | Differential Revision: https://reviews.llvm.org/D63204 llvm-svn: 363934
* [AMDGPU] gfx1010 wave32 metadataStanislav Mekhanoshin2019-06-176-2/+617
| | | | | | Differential Revision: https://reviews.llvm.org/D63207 llvm-svn: 363577
* AMDGPU: Fix printing trailing whitespace after s_endpgmMatt Arsenault2019-06-141-3/+4
| | | | llvm-svn: 363384
* [AMDGPU] gfx1011/gfx1012 targetsStanislav Mekhanoshin2019-06-144-15/+372
| | | | | | Differential Revision: https://reviews.llvm.org/D63307 llvm-svn: 363344
* [AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setregDmitry Preobrazhensky2019-06-132-27/+77
| | | | | | | | | | See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D61125 llvm-svn: 363255
* [AMDGPU] more gfx1010 tests. NFC.Stanislav Mekhanoshin2019-06-122-1/+390
| | | | llvm-svn: 363190
* [AMDGPU] gfx1010 dpp16 and dpp8Stanislav Mekhanoshin2019-06-121-0/+38
| | | | | | Differential Revision: https://reviews.llvm.org/D63203 llvm-svn: 363186
* [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operandsDmitry Preobrazhensky2019-06-031-2/+146
| | | | | | | | | | See bug 39292: https://bugs.llvm.org/show_bug.cgi?id=39292 Reviewers: rampitec, arsenm Differential Revision: https://reviews.llvm.org/D62660 llvm-svn: 362400
* [AMDGPU][MC] Enabled constant expressions as operands of s_waitcntDmitry Preobrazhensky2019-05-272-2/+50
| | | | | | | | | | See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D61017 llvm-svn: 361763
* [AMDGPU][MC] Corrected parsing of op_sel* and neg_* modifiersDmitry Preobrazhensky2019-05-223-78/+121
| | | | | | | | | | See bug 41361: https://bugs.llvm.org/show_bug.cgi?id=41361 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D61012 llvm-svn: 361386
* [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiersDmitry Preobrazhensky2019-05-172-0/+23
| | | | | | | | | | See bug 41298: https://bugs.llvm.org/show_bug.cgi?id=41298 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D61009 llvm-svn: 361045
* [AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_forkDmitry Preobrazhensky2019-05-172-5/+24
| | | | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=41888 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D62016 llvm-svn: 361040
* [AMDGPU][MC] Enabled expressions for most operands which accept integer valuesDmitry Preobrazhensky2019-05-179-164/+432
| | | | | | | | | | See bug 40873: https://bugs.llvm.org/show_bug.cgi?id=40873 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D60768 llvm-svn: 361031
* [AMDGPU][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliasesDmitry Preobrazhensky2019-05-141-0/+24
| | | | | | | | Reviewers: rampitec, arsenm Differential Revision: https://reviews.llvm.org/D61905 llvm-svn: 360702
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