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author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2019-11-18 17:23:40 +0300 |
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committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2019-11-18 17:23:40 +0300 |
commit | edd9f701638e28c4419658c1daed25ea0c6e8841 (patch) | |
tree | e315e05517151074f0a88f6fc80b62d9419954b6 /llvm/test/MC/AMDGPU | |
parent | b622ff39c0c482494a7400ac0256b543025cd449 (diff) | |
download | bcm5719-llvm-edd9f701638e28c4419658c1daed25ea0c6e8841.tar.gz bcm5719-llvm-edd9f701638e28c4419658c1daed25ea0c6e8841.zip |
[AMDGPU][MC][GFX10] Enabled v_movrel*[sdwa|dpp|dpp8] opcodes
See https://bugs.llvm.org/show_bug.cgi?id=43712
Reviewers: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D70170
Diffstat (limited to 'llvm/test/MC/AMDGPU')
-rw-r--r-- | llvm/test/MC/AMDGPU/gfx10_asm_all.s | 91 | ||||
-rw-r--r-- | llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s | 12 | ||||
-rw-r--r-- | llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s | 12 |
3 files changed, 113 insertions, 2 deletions
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_all.s b/llvm/test/MC/AMDGPU/gfx10_asm_all.s index 79e5514f2e7..220f5b2d5b0 100644 --- a/llvm/test/MC/AMDGPU/gfx10_asm_all.s +++ b/llvm/test/MC/AMDGPU/gfx10_asm_all.s @@ -32163,6 +32163,18 @@ v_movreld_b32_e64 v5, 0.5 v_movreld_b32_e64 v5, -4.0 // GFX10: encoding: [0x05,0x00,0xc2,0xd5,0xf7,0x00,0x00,0x00] +v_movreld_b32_sdwa v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x84,0x00,0x7e,0x02,0x06,0x06,0x00] + +v_movreld_b32_sdwa v0, s2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x84,0x00,0x7e,0x02,0x06,0x86,0x00] + +v_movreld_b32_sdwa v0, 64 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x84,0x00,0x7e,0xc0,0x06,0x86,0x00] + +v_movreld_b32_sdwa v0, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x84,0x00,0x7e,0x00,0x06,0x0e,0x00] + v_movrels_b32 v5, v1 // GFX10: encoding: [0x01,0x87,0x0a,0x7e] @@ -32181,6 +32193,30 @@ v_movrels_b32_e64 v255, v1 v_movrels_b32_e64 v5, v255 // GFX10: encoding: [0x05,0x00,0xc3,0xd5,0xff,0x01,0x00,0x00] +v_movrels_b32_sdwa v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x86,0x00,0x7e,0x02,0x06,0x06,0x00] + +v_movrels_b32_sdwa v0, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x86,0x00,0x7e,0x00,0x06,0x0e,0x00] + +v_movrels_b32_e32 v5, s1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrels_b32_e32 v5, 1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrels_b32_e64 v5, s1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrels_b32_e64 v5, 1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrels_b32_sdwa v0, s2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10-ERR: error: source operand must be a VGPR + +v_movrels_b32_sdwa v0, 1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10-ERR: error: source operand must be a VGPR + v_movrelsd_b32 v5, v1 // GFX10: encoding: [0x01,0x89,0x0a,0x7e] @@ -32199,9 +32235,33 @@ v_movrelsd_b32_e64 v255, v1 v_movrelsd_b32_e64 v5, v255 // GFX10: encoding: [0x05,0x00,0xc4,0xd5,0xff,0x01,0x00,0x00] -v_movrelsd_b32 v5, s1 +v_movrelsd_b32_sdwa v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x88,0x00,0x7e,0x02,0x06,0x06,0x00] + +v_movrelsd_b32_sdwa v0, v0 dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x88,0x00,0x7e,0x00,0x06,0x06,0x00] + +v_movrelsd_b32_sdwa v0, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x88,0x00,0x7e,0x00,0x06,0x0e,0x00] + +v_movrelsd_b32_e32 v5, s1 // GFX10-ERR: error: invalid operand for instruction +v_movrelsd_b32_e32 v5, 1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrelsd_b32_e64 v5, s1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrelsd_b32_e64 v5, 1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrelsd_b32_sdwa v0, s2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10-ERR: error: source operand must be a VGPR + +v_movrelsd_b32_sdwa v0, 1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10-ERR: error: source operand must be a VGPR + v_movrelsd_2_b32 v5, v1 // GFX10: encoding: [0x01,0x91,0x0a,0x7e] @@ -32220,9 +32280,36 @@ v_movrelsd_2_b32_e64 v255, v1 v_movrelsd_2_b32_e64 v5, v255 // GFX10: encoding: [0x05,0x00,0xc8,0xd5,0xff,0x01,0x00,0x00] -v_movrelsd_2_b32 v5, s1 +v_movrelsd_2_b32_sdwa v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x90,0x00,0x7e,0x02,0x06,0x06,0x00] + +v_movrelsd_2_b32_sdwa v0, v0 dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x90,0x00,0x7e,0x00,0x06,0x06,0x00] + +v_movrelsd_2_b32_sdwa v0, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10: encoding: [0xf9,0x90,0x00,0x7e,0x00,0x06,0x0e,0x00] + +v_movrelsd_2_b32_e32 v5, s1 // GFX10-ERR: error: invalid operand for instruction +v_movrelsd_2_b32_e32 v5, 1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrelsd_2_b32_e64 v5, s1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrelsd_2_b32_e64 v5, 1 +// GFX10-ERR: error: invalid operand for instruction + +v_movrelsd_2_b32_sdwa v0, s2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10-ERR: error: source operand must be a VGPR + +v_movrelsd_2_b32_sdwa v0, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10-ERR: error: source operand must be a VGPR + +v_movrelsd_2_b32_sdwa v0, null dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD +// GFX10-ERR: error: source operand must be a VGPR + v_cvt_f16_u16_e32 v5, v1 // GFX10: encoding: [0x01,0xa1,0x0a,0x7e] diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s b/llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s index e2f67337b69..ce3cef52e89 100644 --- a/llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s +++ b/llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s @@ -680,3 +680,15 @@ v_subrev_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x1 bank_mask:0x0 v_subrev_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 // GFX10: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x04,0x00] + +v_movreld_b32_dpp v1, v0 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 +// GFX10: [0xfa,0x84,0x02,0x7e,0x00,0x1b,0x00,0x00] + +v_movrels_b32_dpp v1, v0 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 +// GFX10: [0xfa,0x86,0x02,0x7e,0x00,0x1b,0x04,0x00] + +v_movrelsd_2_b32_dpp v0, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 +// GFX10: [0xfa,0x90,0x00,0x7e,0x02,0x1b,0x00,0x00] + +v_movrelsd_b32_dpp v0, v255 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 +// GFX10: [0xfa,0x88,0x00,0x7e,0xff,0x1b,0x00,0x00] diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s b/llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s index b148356c96d..70d779a047b 100644 --- a/llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s +++ b/llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s @@ -577,3 +577,15 @@ v_mac_f32 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] v_mac_f32 v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 // GFX10: v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x3e,0x01,0x77,0x39,0x05] + +v_movreld_b32 v0, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1 +// GFX10: [0xea,0x84,0x00,0x7e,0x01,0x77,0x39,0x05] + +v_movrels_b32 v0, v2 dpp8:[0,0,0,0,0,0,0,0] +// GFX10: [0xe9,0x86,0x00,0x7e,0x02,0x00,0x00,0x00] + +v_movrelsd_2_b32 v0, v255 dpp8:[7,6,5,4,3,2,1,0] +// GFX10: [0xe9,0x90,0x00,0x7e,0xff,0x77,0x39,0x05] + +v_movrelsd_b32 v0, v2 dpp8:[7,6,5,4,3,2,1,0] +// GFX10: [0xe9,0x88,0x00,0x7e,0x02,0x77,0x39,0x05] |