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| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2019-07-19 13:12:47 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2019-07-19 13:12:47 +0000 |
| commit | 4ccb7f8c45078db106347dd98cbb3af4ee9f3102 (patch) | |
| tree | d1da4887d4a9da7a9daa6a0bace9076982776f3c /llvm/test/MC/AMDGPU | |
| parent | dec624682e062dabfb0a535a9b975e5b550f8f29 (diff) | |
| download | bcm5719-llvm-4ccb7f8c45078db106347dd98cbb3af4ee9f3102.tar.gz bcm5719-llvm-4ccb7f8c45078db106347dd98cbb3af4ee9f3102.zip | |
[AMDGPU][MC] Corrected parsing of branch offsets
See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D64629
llvm-svn: 366571
Diffstat (limited to 'llvm/test/MC/AMDGPU')
| -rw-r--r-- | llvm/test/MC/AMDGPU/branch-comment.s | 3 | ||||
| -rw-r--r-- | llvm/test/MC/AMDGPU/sopk.s | 10 | ||||
| -rw-r--r-- | llvm/test/MC/AMDGPU/sopp-err.s | 18 | ||||
| -rw-r--r-- | llvm/test/MC/AMDGPU/sopp.s | 12 |
4 files changed, 40 insertions, 3 deletions
diff --git a/llvm/test/MC/AMDGPU/branch-comment.s b/llvm/test/MC/AMDGPU/branch-comment.s index e9cada619af..32c82b672ae 100644 --- a/llvm/test/MC/AMDGPU/branch-comment.s +++ b/llvm/test/MC/AMDGPU/branch-comment.s @@ -37,6 +37,3 @@ s_branch 32768 s_branch 32767 // BIN: s_branch 32767 // 000000000024: BF827FFF <keep_symbol+0x20018> - -s_branch 0x80000000ffff -// BIN: s_branch 65535 // 000000000028: BF82FFFF <keep_symbol+0x1c> diff --git a/llvm/test/MC/AMDGPU/sopk.s b/llvm/test/MC/AMDGPU/sopk.s index 75ee3110bcc..2c924571222 100644 --- a/llvm/test/MC/AMDGPU/sopk.s +++ b/llvm/test/MC/AMDGPU/sopk.s @@ -330,3 +330,13 @@ s_call_b64 s[100:101], 12609 s_call_b64 s[10:11], 49617 // GFX9: s_call_b64 s[10:11], 49617 ; encoding: [0xd1,0xc1,0x8a,0xba] // NOSICIVI: error: instruction not supported on this GPU + +offset = 4 +s_call_b64 s[0:1], offset + 4 +// GFX9: s_call_b64 s[0:1], 8 ; encoding: [0x08,0x00,0x80,0xba] +// NOSICIVI: error: instruction not supported on this GPU + +offset = 4 +s_call_b64 s[0:1], 4 + offset +// GFX9: s_call_b64 s[0:1], 8 ; encoding: [0x08,0x00,0x80,0xba] +// NOSICIVI: error: instruction not supported on this GPU diff --git a/llvm/test/MC/AMDGPU/sopp-err.s b/llvm/test/MC/AMDGPU/sopp-err.s index 69c0c86a63d..2a78940655f 100644 --- a/llvm/test/MC/AMDGPU/sopp-err.s +++ b/llvm/test/MC/AMDGPU/sopp-err.s @@ -157,3 +157,21 @@ s_waitcnt x s_waitcnt vmcnt(0 // GCN: error: expected a closing parenthesis + +s_branch 0x80000000ffff +// GCN: error: expected a 16-bit signed jump offset + +s_branch 0x10000 +// GCN: error: expected a 16-bit signed jump offset + +s_branch -32769 +// GCN: error: expected a 16-bit signed jump offset + +s_branch 1.0 +// GCN: error: expected a 16-bit signed jump offset + +s_branch s0 +// GCN: error: invalid operand for instruction + +s_branch offset:1 +// GCN: error: not a valid operand diff --git a/llvm/test/MC/AMDGPU/sopp.s b/llvm/test/MC/AMDGPU/sopp.s index af683be06e5..4be93237411 100644 --- a/llvm/test/MC/AMDGPU/sopp.s +++ b/llvm/test/MC/AMDGPU/sopp.s @@ -382,3 +382,15 @@ s_endpgm_saved s_wakeup // VI: s_wakeup ; encoding: [0x00,0x00,0x83,0xbf] // NOSICI: error: instruction not supported on this GPU + +//===----------------------------------------------------------------------===// +// absolute expressions as branch offsets +//===----------------------------------------------------------------------===// + +offset = 3 +s_branch 1+offset +// GCN: s_branch 4 ; encoding: [0x04,0x00,0x82,0xbf] + +offset = 3 +s_branch offset+1 +// GCN: s_branch 4 ; encoding: [0x04,0x00,0x82,0xbf] |
