summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Hexagon
Commit message (Expand)AuthorAgeFilesLines
* [Pipeliner] Fix an assertion caused by iterator invalidation.Sumanth Gundapaneni2019-11-141-0/+32
* [Hexagon] Validate the iterators before converting them to mux.Sumanth Gundapaneni2019-11-141-0/+30
* [Hexagon] Fix vector spill expansion to use proper alignmentKrzysztof Parzyszek2019-11-122-1/+17
* [ModuloSchedule] Fix modulo expansion for data loop carried dependencies.Thomas Raoux2019-11-113-3/+54
* Fix pattern error for S2_tstbit_i instructionIkhlas Ajbar2019-10-301-0/+34
* [Hexagon] Handle remaining registers in getRegisterByName()Krzysztof Parzyszek2019-10-291-0/+780
* [DFAPacketizer] Use DFAEmitter. NFC.James Molloy2019-10-171-2/+2
* [ModuloSchedule] removeBranch() *before* creating the trip count conditionJames Molloy2019-10-031-1/+1
* [ModuloSchedule] Peel out prologs and epilogs, generate actual codeJames Molloy2019-10-0255-61/+61
* [Hexagon] Bitcast v4i16 to v8i8, unify no-op casts between scalar and HVXKrzysztof Parzyszek2019-09-231-0/+13
* [MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduceLoopCountJames Molloy2019-09-211-2/+2
* Revert "[MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduce...Mitch Phillips2019-09-201-2/+2
* [MVT] Add v256i1 to MachineValueTypeKrzysztof Parzyszek2019-09-201-0/+15
* [MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduceLoopCountJames Molloy2019-09-201-2/+2
* [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir...Guillaume Chatelet2019-09-116-6/+6
* [DFAPacketizer] Reapply: Track resources for packetized instructionsJames Molloy2019-09-091-0/+29
* Revert rL371198 from llvm/trunk: [DFAPacketizer] Track resources for packetiz...Simon Pilgrim2019-09-091-29/+0
* [DFAPacketizer] Track resources for packetized instructionsJames Molloy2019-09-061-0/+29
* [Hexagon] Fix type in HexagonTargetLowering::ReplaceNodeResultsKrzysztof Parzyszek2019-09-051-0/+18
* [Hexagon] Improve generated code for test-if-bit-clear, one more timeKrzysztof Parzyszek2019-09-042-36/+11
* [MachinePipeliner] Add a way to unit-test the schedule emitterJames Molloy2019-09-031-0/+151
* [DAGCombiner] try to form test+set out of shift+mask patternsSanjay Patel2019-09-021-11/+36
* Revert [MBP] Disable aggressive loop rotate in plain modeJordan Rupprecht2019-08-294-4/+6
* [Hexagon] Improve generated code for test-if-bit-clearKrzysztof Parzyszek2019-08-261-21/+12
* [Hexagon] remove noise from tests; NFCSanjay Patel2019-08-251-15/+10
* [Hexagon][x86] add tests for bit-test; NFCSanjay Patel2019-08-251-1/+98
* [MBP] Disable aggressive loop rotate in plain modeGuozhi Wei2019-08-224-6/+4
* [test] Fix tests when run on windows after SVN r369426. NFC.Martin Storsjo2019-08-202-3/+3
* [CodeGen] Add EarlyIfConvert test missed in previous commitThomas Raoux2019-08-201-0/+81
* [Hexagon] Generate min/max instructions for 64-bit vectorsKrzysztof Parzyszek2019-08-162-1/+203
* [Hexagon] Fix instruction selection for vselect v4i8Krzysztof Parzyszek2019-08-151-0/+9
* [Hexagon] Generate vector min/max for HVXKrzysztof Parzyszek2019-08-154-180/+868
* Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"Hans Wennborg2019-08-124-4/+6
* [MBP] Disable aggressive loop rotate in plain modeGuozhi Wei2019-08-084-6/+4
* [Hexagon] Custom-lower UADDO(x, 1) and USUBO(x, 1)Krzysztof Parzyszek2019-07-011-0/+37
* [Hexagon] Rework VLCR algorithmKrzysztof Parzyszek2019-07-011-0/+82
* Rename ExpandISelPseudo->FinalizeISel, delay register reservationMatt Arsenault2019-06-191-1/+1
* [SCEV] Use NoWrapFlags when expanding a simple mulSam Parker2019-06-171-1/+1
* [lit] Delete empty lines at the end of lit.local.cfg NFCFangrui Song2019-06-171-1/+0
* [MBP] Move a latch block with conditional exit and multi predecessors to top ...Guozhi Wei2019-06-144-4/+6
* Revert "[SCEV] Use wrap flags in InsertBinop"Benjamin Kramer2019-06-061-1/+1
* [SCEV] Use wrap flags in InsertBinopSam Parker2019-06-061-1/+1
* UpdateTestChecks: hexagon supportRoman Lebedev2019-06-053-14/+111
* [NFC] Make tests more robust for new optimizationsDavid Bolvansky2019-05-254-8/+8
* [llvm-readobj] Change -long-option to --long-option in tests. NFCFangrui Song2019-05-011-1/+1
* [AsmPrinter] refactor to support %c w/ GlobalAddress'Nick Desaulniers2019-04-261-2/+11
* Enable LoopVectorization by default.Alina Sbirlea2019-04-251-1/+1
* [DAGCombiner] Combine OR as ADD when no common bits are setBjorn Pettersson2019-04-231-1/+4
* [LSR] Limit the recursion for setup costDavid Green2019-04-231-1/+1
* [AsmPrinter] defer %c to base class for ARM, PPC, and Hexagon. NFCNick Desaulniers2019-04-171-0/+17
OpenPOWER on IntegriCloud