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| author | James Molloy <jmolloy@google.com> | 2019-09-06 12:20:08 +0000 |
|---|---|---|
| committer | James Molloy <jmolloy@google.com> | 2019-09-06 12:20:08 +0000 |
| commit | db2fa0672210705ff1ca6d38f487970e4536809f (patch) | |
| tree | a06a2e70ef4d43e7af1bbaaad36df151f9f58186 /llvm/test/CodeGen/Hexagon | |
| parent | 90d32df7db51ec69bee38eedc4549976b7c52321 (diff) | |
| download | bcm5719-llvm-db2fa0672210705ff1ca6d38f487970e4536809f.tar.gz bcm5719-llvm-db2fa0672210705ff1ca6d38f487970e4536809f.zip | |
[DFAPacketizer] Track resources for packetized instructions
This patch allows the DFAPacketizer to be queried after a packet is formed to work out which
resources were allocated to the packetized instructions.
This is particularly important for targets that do their own bundle packing - it's not
sufficient to know simply that instructions can share a packet; which slots are used is
also required for encoding.
This extends the emitter to emit a side-table containing resource usage diffs for each
state transition. The packetizer maintains a set of all possible resource states in its
current state. After packetization is complete, all remaining resource states are
possible packetization strategies.
The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't need the extra
maintained state).
Differential Revision: https://reviews.llvm.org/D66936
llvm-svn: 371198
Diffstat (limited to 'llvm/test/CodeGen/Hexagon')
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/packetizer-resources.ll | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/packetizer-resources.ll b/llvm/test/CodeGen/Hexagon/packetizer-resources.ll new file mode 100644 index 00000000000..9bd0cb1f5fa --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/packetizer-resources.ll @@ -0,0 +1,29 @@ +; RUN: llc -O2 -march=hexagon < %s -debug-only=packets 2>&1 | FileCheck %s +; REQUIRES: asserts + +; CHECK: Finalizing packet: +; CHECK-NEXT: * [res:0x8] renamable $r1 = S2_vsplatrb renamable $r0 +; CHECK-NEXT: * [res:0x4] renamable $d1 = S2_vsplatrh killed renamable $r0 + +target triple = "hexagon" + +; Function Attrs: nounwind readnone +define i64 @f0(i64 %a0) #0 { +b0: + %v0 = trunc i64 %a0 to i32 + %v1 = and i32 %v0, 65535 + %v2 = tail call i64 @llvm.hexagon.S2.vsplatrh(i32 %v1) + %v3 = and i32 %v0, 255 + %v4 = tail call i32 @llvm.hexagon.S2.vsplatrb(i32 %v3) + %v5 = sext i32 %v4 to i64 + %v6 = add nsw i64 %v5, %v2 + ret i64 %v6 +} + +; Function Attrs: nounwind readnone +declare i64 @llvm.hexagon.S2.vsplatrh(i32) #0 + +; Function Attrs: nounwind readnone +declare i32 @llvm.hexagon.S2.vsplatrb(i32) #0 + +attributes #0 = { nounwind readnone } |

