| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Reduce dyn_cast<> to isa<> or cast<> where possible. | Benjamin Kramer | 2015-04-10 | 1 | -1/+1 |
| * | [Hexagon] Add support for vector instructions | Krzysztof Parzyszek | 2015-03-19 | 1 | -23/+858 |
| * | Remove unused complex patterns for addressing modes on Hexagon. | Krzysztof Parzyszek | 2015-03-12 | 1 | -4/+9 |
| * | [Hexagon] Renaming HexagonJT to JT and adding CP for constantpool. | Colin LeMahieu | 2015-03-10 | 1 | -1/+1 |
| * | getRegForInlineAsmConstraint wants to use TargetRegisterInfo for | Eric Christopher | 2015-02-26 | 1 | -5/+5 |
| * | Remove an argument-less call to getSubtargetImpl from TargetLoweringBase. | Eric Christopher | 2015-02-26 | 1 | -1/+1 |
| * | CodeGen: convert CCState interface to using ArrayRefs | Tim Northover | 2015-02-21 | 1 | -2/+2 |
| * | [Hexagon] Removing more V4 predicates since V4 is the required minimum. | Colin LeMahieu | 2015-02-09 | 1 | -7/+2 |
| * | [Hexagon] Simplifying and formatting several patterns. Changing a pattern mu... | Colin LeMahieu | 2015-02-05 | 1 | -1/+2 |
| * | Only access TLOF via the TargetMachine, not TargetLowering. | Eric Christopher | 2015-02-03 | 1 | -3/+4 |
| * | Cache and use the subtarget that owns the target lowering. | Eric Christopher | 2015-02-02 | 1 | -22/+14 |
| * | [Hexagon] Updating several V5 intrinsics and adding FP tests. | Colin LeMahieu | 2015-01-28 | 1 | -1/+1 |
| * | [Hexagon] Updating call/jump instruction patterns. | Colin LeMahieu | 2015-01-16 | 1 | -2/+6 |
| * | [Hexagon] Deleting old float comparison instruction and updating references t... | Colin LeMahieu | 2015-01-15 | 1 | -1/+2 |
| * | [Hexagon] Replacing old fadd/fsub instructions and updating references. | Colin LeMahieu | 2015-01-15 | 1 | -3/+11 |
| * | [SelectionDAG] Allow targets to specify legality of extloads' result | Ahmed Bougacha | 2015-01-08 | 1 | -2/+4 |
| * | [Hexagon] Adding xtype parity, min, minu, max, maxu instructions. | Colin LeMahieu | 2014-12-08 | 1 | -0/+14 |
| * | We can get the TLOF from the TargetMachine - so constructor no longer require... | Aditya Nandakumar | 2014-11-13 | 1 | -1/+1 |
| * | This patch changes the ownership of TLOF from TargetLoweringBase to TargetMac... | Aditya Nandakumar | 2014-11-13 | 1 | -1/+1 |
| * | Remove the target machine from CCState. Previously it was only used | Eric Christopher | 2014-08-06 | 1 | -12/+11 |
| * | Have MachineFunction cache a pointer to the subtarget to make lookups | Eric Christopher | 2014-08-05 | 1 | -6/+5 |
| * | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -8/+9 |
| * | Make HexagonISelLowering not dependent upon a HexagonTargetMachine, | Eric Christopher | 2014-06-27 | 1 | -19/+23 |
| * | Reduce indentation. | Eric Christopher | 2014-06-27 | 1 | -362/+360 |
| * | Hexagon: Expand i1 SELECT_CC | Tom Stellard | 2014-06-10 | 1 | -0/+1 |
| * | SelectionDAG: Don't use MVT::Other to determine legality of ISD::SELECT_CC | Tom Stellard | 2014-06-10 | 1 | -6/+0 |
| * | SelectionDAG: Expand SELECT_CC to SELECT + SETCC | Tom Stellard | 2014-06-10 | 1 | -18/+2 |
| * | [C++] Use 'nullptr'. | Craig Topper | 2014-04-28 | 1 | -1/+1 |
| * | Convert SelectionDAG::getMergeValues to use ArrayRef. | Craig Topper | 2014-04-27 | 1 | -1/+1 |
| * | Convert SelectionDAG::getNode methods to use ArrayRef<SDValue>. | Craig Topper | 2014-04-26 | 1 | -8/+5 |
| * | [C++] Use 'nullptr'. Target edition. | Craig Topper | 2014-04-25 | 1 | -2/+2 |
| * | [Modules] Make Support/Debug.h modular. This requires it to not change | Chandler Carruth | 2014-04-21 | 1 | -0/+2 |
| * | Make consistent use of MCPhysReg instead of uint16_t throughout the tree. | Craig Topper | 2014-04-04 | 1 | -3/+3 |
| * | Remove unnecessary #includes. | Bill Wendling | 2014-01-06 | 1 | -1/+0 |
| * | Refactor function that checks that __builtin_returnaddress's argument is cons... | Bill Wendling | 2014-01-06 | 1 | -4/+1 |
| * | Emit an error message if the value passed to __builtin_returnaddress isn't a ... | Bill Wendling | 2014-01-05 | 1 | -0/+7 |
| * | Hexagon: Remove global state. | Benjamin Kramer | 2013-10-27 | 1 | -10/+25 |
| * | Fix unused variables. | Eli Friedman | 2013-09-10 | 1 | -2/+0 |
| * | Refactor isInTailCallPosition handling | Tim Northover | 2013-08-06 | 1 | -0/+13 |
| * | Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s... | Craig Topper | 2013-07-14 | 1 | -4/+4 |
| * | Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. | Jakob Stoklund Olesen | 2013-07-04 | 1 | -5/+0 |
| * | Revert r185595-185596 which broke buildbots. | Jakob Stoklund Olesen | 2013-07-04 | 1 | -0/+5 |
| * | Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes. | Jakob Stoklund Olesen | 2013-07-03 | 1 | -5/+0 |
| * | The getRegForInlineAsmConstraint function should only accept MVT value types. | Chad Rosier | 2013-06-22 | 1 | -2/+2 |
| * | Order CALLSEQ_START and CALLSEQ_END nodes. | Andrew Trick | 2013-05-29 | 1 | -2/+3 |
| * | Track IR ordering of SelectionDAG nodes 2/4. | Andrew Trick | 2013-05-25 | 1 | -16/+16 |
| * | Hexagon: SelectionDAG should not use MVT::Other to check the legality of BR_CC. | Jyotsna Verma | 2013-05-21 | 1 | -1/+0 |
| * | Hexagon: Fix Small Data support to handle -G 0 correctly. | Jyotsna Verma | 2013-05-07 | 1 | -1/+0 |
| * | Reverting r181331. | Jyotsna Verma | 2013-05-07 | 1 | -0/+1 |
| * | Hexagon: Fix Small Data support to handle -G 0 correctly. | Jyotsna Verma | 2013-05-07 | 1 | -1/+0 |
