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| author | Craig Topper <craig.topper@gmail.com> | 2014-04-04 05:16:06 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-04-04 05:16:06 +0000 |
| commit | 840beec2d0855db9165c02bc29a79af8e357fc24 (patch) | |
| tree | cc21088e8d06f5c3158cd6fc7e00b483c9f0a817 /llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | |
| parent | 79ed5d44e715537a933c399885dce58c7d877f73 (diff) | |
| download | bcm5719-llvm-840beec2d0855db9165c02bc29a79af8e357fc24.tar.gz bcm5719-llvm-840beec2d0855db9165c02bc29a79af8e357fc24.zip | |
Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
llvm-svn: 205610
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index 92b794d36c7..35fa1aa0d08 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -182,7 +182,7 @@ static bool CC_Hexagon32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) { - static const uint16_t RegList[] = { + static const MCPhysReg RegList[] = { Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4, Hexagon::R5 }; @@ -205,10 +205,10 @@ static bool CC_Hexagon64(unsigned ValNo, MVT ValVT, return false; } - static const uint16_t RegList1[] = { + static const MCPhysReg RegList1[] = { Hexagon::D1, Hexagon::D2 }; - static const uint16_t RegList2[] = { + static const MCPhysReg RegList2[] = { Hexagon::R1, Hexagon::R3 }; if (unsigned Reg = State.AllocateReg(RegList1, RegList2, 2)) { |
