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author | Eric Christopher <echristo@gmail.com> | 2014-08-04 21:25:23 +0000 |
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committer | Eric Christopher <echristo@gmail.com> | 2014-08-04 21:25:23 +0000 |
commit | d913448b38bab6ace92ae5057b917eb57035f83b (patch) | |
tree | f2050928fa5994c44fab60d66e7d89e7cc7d7a4f /llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | |
parent | acc8ef273b1c3796b0fc7f19aa347115b4bc2ea4 (diff) | |
download | bcm5719-llvm-d913448b38bab6ace92ae5057b917eb57035f83b.tar.gz bcm5719-llvm-d913448b38bab6ace92ae5057b917eb57035f83b.zip |
Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.
llvm-svn: 214781
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index a460ea4f342..3356ff4f443 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -464,7 +464,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, SmallVector<SDValue, 8> MemOpChains; const HexagonRegisterInfo *QRI = static_cast<const HexagonRegisterInfo *>( - DAG.getTarget().getRegisterInfo()); + DAG.getTarget().getSubtargetImpl()->getRegisterInfo()); SDValue StackPtr = DAG.getCopyFromReg(Chain, dl, QRI->getStackRegister(), getPointerTy()); @@ -723,7 +723,7 @@ SDValue HexagonTargetLowering::LowerINLINEASM(SDValue Op, // Check it to be lr const HexagonRegisterInfo *QRI = static_cast<const HexagonRegisterInfo *>( - DAG.getTarget().getRegisterInfo()); + DAG.getTarget().getSubtargetImpl()->getRegisterInfo()); if (Reg == QRI->getRARegister()) { FuncInfo->setHasClobberLR(true); break; @@ -817,7 +817,7 @@ HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op, // The Sub result contains the new stack start address, so it // must be placed in the stack pointer register. const HexagonRegisterInfo *QRI = static_cast<const HexagonRegisterInfo *>( - DAG.getTarget().getRegisterInfo()); + DAG.getTarget().getSubtargetImpl()->getRegisterInfo()); SDValue CopyChain = DAG.getCopyToReg(Chain, dl, QRI->getStackRegister(), Sub); SDValue Ops[2] = { ArgAdjust, CopyChain }; @@ -964,7 +964,8 @@ HexagonTargetLowering::LowerConstantPool(SDValue Op, SelectionDAG &DAG) const { SDValue HexagonTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const { - const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo(); + const TargetRegisterInfo *TRI = + DAG.getTarget().getSubtargetImpl()->getRegisterInfo(); MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); MFI->setReturnAddressIsTaken(true); @@ -990,8 +991,8 @@ HexagonTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const { SDValue HexagonTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const { - const HexagonRegisterInfo *TRI = - static_cast<const HexagonRegisterInfo *>(DAG.getTarget().getRegisterInfo()); + const HexagonRegisterInfo *TRI = static_cast<const HexagonRegisterInfo *>( + DAG.getTarget().getSubtargetImpl()->getRegisterInfo()); MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); MFI->setFrameAddressIsTaken(true); @@ -1453,8 +1454,8 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &targetmachine) setMinFunctionAlignment(2); // Needed for DYNAMIC_STACKALLOC expansion. - const HexagonRegisterInfo *QRI = - static_cast<const HexagonRegisterInfo *>(TM.getRegisterInfo()); + const HexagonRegisterInfo *QRI = static_cast<const HexagonRegisterInfo *>( + TM.getSubtargetImpl()->getRegisterInfo()); setStackPointerRegisterToSaveRestore(QRI->getStackRegister()); setSchedulingPreference(Sched::VLIW); } |