| Commit message (Expand) | Author | Age | Files | Lines |
* | In preparation for moving ARM's TargetRegisterInfo to the TargetMachine | Eric Christopher | 2015-03-12 | 1 | -576/+0 |
* | Remove the need to cache the subtarget in the ARM TargetRegisterInfo | Eric Christopher | 2015-03-12 | 1 | -11/+10 |
* | Have TargetRegisterInfo::getLargestLegalSuperClass take a | Eric Christopher | 2015-03-10 | 1 | -4/+4 |
* | Migrate ARM except for TTI, AsmPrinter, and frame lowering | Eric Christopher | 2015-01-29 | 1 | -16/+6 |
* | [ARM] Remove dead assignment. | Tilmann Scheller | 2014-12-19 | 1 | -1/+0 |
* | [Thumb1] Re-write emitThumbRegPlusImmediate | Oliver Stannard | 2014-11-17 | 1 | -136/+134 |
* | [ARM] Remove another redundant assignment. | Tilmann Scheller | 2014-11-05 | 1 | -1/+0 |
* | ARM: rework Thumb1 frame index rewriting | Tim Northover | 2014-10-20 | 1 | -102/+11 |
* | [Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex | Oliver Stannard | 2014-10-20 | 1 | -0/+1 |
* | ARM: allow misaligned local variables in Thumb1 mode. | Tim Northover | 2014-10-14 | 1 | -3/+1 |
* | Have MachineFunction cache a pointer to the subtarget to make lookups | Eric Christopher | 2014-08-05 | 1 | -8/+4 |
* | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -7/+17 |
* | Simplify resolveFrameIndex() signature. | Jim Grosbach | 2014-04-02 | 1 | -4/+2 |
* | Prune includes in ARM target. | Craig Topper | 2014-03-22 | 1 | -2/+0 |
* | [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. | Benjamin Kramer | 2014-03-02 | 1 | -1/+1 |
* | ARM: remove unnecessary state-tracking during frame lowering. | Tim Northover | 2013-11-04 | 1 | -5/+1 |
* | Even more spelling fixes for "instruction". | Robert Wilhelm | 2013-09-28 | 1 | -1/+1 |
* | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -3/+9 |
* | Allow the register scavenger to spill multiple registers | Hal Finkel | 2013-03-22 | 1 | -1/+1 |
* | Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo | Eli Bendersky | 2013-02-21 | 1 | -41/+0 |
* | [PEI] Pass the frame index operand number to the eliminateFrameIndex function. | Chad Rosier | 2013-01-31 | 1 | -15/+12 |
* | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth | 2013-01-02 | 1 | -4/+4 |
* | Remove the explicit MachineInstrBuilder(MI) constructor. | Jakob Stoklund Olesen | 2012-12-19 | 1 | -6/+3 |
* | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 | 1 | -6/+6 |
* | Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). | Jakob Stoklund Olesen | 2012-05-07 | 1 | -1/+2 |
* | Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s... | Craig Topper | 2012-04-20 | 1 | -4/+4 |
* | Reorder includes to match coding standards. Fix an issue or two exposed by that. | Craig Topper | 2012-03-17 | 1 | -2/+1 |
* | Handle regmasks in Thumb1RegisterInfo::saveScavengerRegister(). | Jakob Stoklund Olesen | 2012-03-01 | 1 | -0/+5 |
* | Enable ARM base pointer when calling functions with large arguments. | Jakob Stoklund Olesen | 2012-02-28 | 1 | -0/+16 |
* | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
* | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-07 | 1 | -1/+1 |
* | Add bundle aware API for querying instruction properties and switch the code | Evan Cheng | 2011-12-07 | 1 | -4/+3 |
* | Fix a regression from r138445. If we're loading from the frame/base pointer | Chad Rosier | 2011-10-10 | 1 | -0/+1 |
* | Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode. | Jim Grosbach | 2011-08-24 | 1 | -14/+6 |
* | 80 columns. | Jim Grosbach | 2011-08-17 | 1 | -1/+2 |
* | Tidy up. | Jim Grosbach | 2011-08-17 | 1 | -2/+1 |
* | Silence a bunch (but not all) "variable written but not read" warnings | Duncan Sands | 2011-08-12 | 1 | -2/+2 |
* | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -1/+1 |
* | Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for | Evan Cheng | 2011-07-18 | 1 | -1/+0 |
* | Refact ARM Thumb1 tMOVr instruction family. | Jim Grosbach | 2011-06-30 | 1 | -3/+3 |
* | Thumb1 register to register MOV instruction is predicable. | Jim Grosbach | 2011-06-30 | 1 | -11/+11 |
* | Refactor away tSpill and tRestore pseudos in ARM backend. | Jim Grosbach | 2011-06-29 | 1 | -5/+3 |
* | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -8/+8 |
* | Use TRI::has{Sub,Super}ClassEq() where possible. | Jakob Stoklund Olesen | 2011-06-02 | 1 | -1/+1 |
* | Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on regist... | Jakob Stoklund Olesen | 2011-04-26 | 1 | -0/+8 |
* | Trim a few unneeded includes. | Jim Grosbach | 2011-04-18 | 1 | -2/+0 |
* | Provide a legal pointer register class when targeting thumb1. | Jakob Stoklund Olesen | 2011-03-31 | 1 | -0/+5 |
* | In Thumb1 mode the constant might be materialized via the load from constpool... | Anton Korobeynikov | 2011-03-05 | 1 | -3/+3 |
* | Implement frame unwinding information emission for Thumb1. Not finished yet b... | Anton Korobeynikov | 2011-03-05 | 1 | -25/+35 |
* | Preliminary support for ARM frame save directives emission via MI flags. | Anton Korobeynikov | 2011-03-05 | 1 | -13/+13 |