summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM
Commit message (Expand)AuthorAgeFilesLines
* [arm] Add big-endian version of pcrel fixups for adr instructionsDimitry Andric2020-05-191-12/+8
* [ARM] Only produce qadd8b under hasV6OpsDavid Green2020-05-191-1/+1
* [MC][ARM] Resolve some pcrel fixups at assembly time (PR44929)Hans Wennborg2020-02-271-12/+10
* Don't generate libcalls for wide shift on Windows ARM (PR42711)Hans Wennborg2020-02-251-1/+1
* [FPEnv][ARM] Don't call mutateStrictFPToFP when loweringJohn Brawn2020-02-181-2/+10
* [ARM] Fix infinite loop when lowering STRICT_FP_EXTENDJohn Brawn2020-02-181-0/+9
* [FPEnv][ARM] Add lowering of STRICT_FSETCC and STRICT_FSETCCSJohn Brawn2020-02-183-10/+75
* Fix an unused variable warningHans Wennborg2020-02-121-1/+1
* Revert "[ARM] Improve codegen of volatile load/store of i64"Victor Campos2020-02-086-162/+6
* [ARM][VecReduce] Force expand vector_reduce_fminDavid Green2020-02-051-3/+6
* [ARM] Expand vector reduction intrinsics on soft floatNikita Popov2020-02-051-1/+8
* [AArch64][ARM] Always expand ordered vector reductions (PR44600)Nikita Popov2020-02-051-1/+10
* Add function attribute "patchable-function-prefix" to support -fpatchable-fun...Fangrui Song2020-01-241-4/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2020-01-146-6/+6
* [ARM][MVE] VTP Block Pass fixSjoerd Meijer2020-01-141-2/+2
* [ARM,MVE] Use the new Tablegen `defvar` and `if` statements.Simon Tatham2020-01-141-253/+232
* [ARM][LowOverheadLoops] Allow all MVE instrs.Sam Parker2020-01-141-21/+18
* [ARM][LowOverheadLoops] Change predicate inspectionSam Parker2020-01-141-26/+27
* [ARM][Thumb2] Fix ADD/SUB invalid writes to SPDiogo Sampaio2020-01-147-86/+351
* [ARM][MVE] Disallow VPSEL for tail predicationSam Parker2020-01-142-4/+16
* [ARM][MVE] Masked gathers from base + vector of offsetsAnna Welker2020-01-141-38/+162
* [Scheduler] Remove superfluous casts. NFCDavid Green2020-01-131-1/+1
* ARMLowOverheadLoops: return earlier to avoid printing irrelevant dbg msg. NFCSjoerd Meijer2020-01-131-0/+1
* [Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()Fangrui Song2020-01-111-13/+7
* [TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare from R...Craig Topper2020-01-102-8/+4
* [ARM][MVE] Tail predicate VMAX,VMAXA,VMIN,VMINASam Parker2020-01-101-0/+2
* ARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP loops. NFC.Sjoerd Meijer2020-01-101-7/+16
* Reverting, broke some bots. Need further investigation.Diogo Sampaio2020-01-107-336/+85
* [ARM][Thumb2] Fix ADD/SUB invalid writes to SPDiogo Sampaio2020-01-107-85/+336
* TableGen/GlobalISel: Add way for SDNodeXForm to work on timmMatt Arsenault2020-01-091-6/+9
* CodeGen: Use LLT instead of EVT in getRegisterByNameMatt Arsenault2020-01-092-2/+2
* [NFC][ARM] LowOverheadLoop commentsSam Parker2020-01-091-0/+16
* [ARM][MVE] Don't unroll intrinsic loops.Sam Parker2020-01-091-4/+5
* Revert "[ARM][LowOverheadLoops] Update liveness info"Sam Parker2020-01-091-64/+0
* [ARM][LowOverheadLoops] Update liveness infoSam Parker2020-01-091-0/+64
* [ARM,MVE] Intrinsics for variable shift instructions.Simon Tatham2020-01-081-12/+49
* [ARM,MVE] Intrinsics for partial-overwrite imm shifts.Simon Tatham2020-01-081-49/+123
* [ARM][MVE] Enable masked gathers from vector of pointersAnna Welker2020-01-086-1/+208
* [ARM][MVE] VPT Blocks: findVCMPToFoldIntoVPSSjoerd Meijer2020-01-071-31/+41
* [ARM] Improve codegen of volatile load/store of i64Victor Campos2020-01-076-6/+162
* [MC] Add parameter `Address` to MCInstrPrinter::printInstructionFangrui Song2020-01-062-5/+5
* [MC] Add parameter `Address` to MCInstPrinter::printInstFangrui Song2020-01-062-4/+5
* [ARM] Use the correct opcodes for Thumb2 segmented stack frame loweringDavid Green2020-01-061-2/+4
* [ARM] Use correct TRAP opcode for thumb in FastISelDavid Green2020-01-061-2/+6
* [ARM,MVE] Fix many signedness errors in MVE intrinsics.Simon Tatham2020-01-061-28/+49
* [ARM,MVE] Generate the right instruction for vmaxnmq_m_f16.Simon Tatham2020-01-061-2/+2
* [NFC] Fix trivial typos in commentsJames Henderson2020-01-065-5/+5
* [ARM][MVE] More MVETailPredication debug messages. NFC.Sjoerd Meijer2020-01-062-65/+96
* [MC][ARM] Delete MCSection::HasData and move SHF_ARM_PURECODE logic to ARMELF...Fangrui Song2020-01-051-2/+5
* [ARM] Use isFMAFasterThanFMulAndFAdd for scalars as well as MVE vectorsDavid Green2020-01-055-18/+45
OpenPOWER on IntegriCloud