bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	add shifts to addressing mode 1	Rafael Espindola	2006-09-13	1	-4/+8
\| \| \| \|	llvm-svn: 30291
*	partial implementation of the ARM Addressing Mode 1	Rafael Espindola	2006-09-11	1	-4/+4
\| \| \| \|	llvm-svn: 30252
*	Completely eliminate def&use operands. Now a register operand is EITHER a	Chris Lattner	2006-09-05	1	-2/+2
\| \| \| \| \| \|	def operand or a use operand. llvm-svn: 30109
*	add a "load effective address"	Rafael Espindola	2006-08-17	1	-1/+2
\| \| \| \|	llvm-svn: 29748
*	Declare the callee saved regs	Rafael Espindola	2006-08-16	1	-8/+10
\| \| \| \| \| \| \|	Remove the hard coded store and load of the link register Implement ARMFrameInfo llvm-svn: 29727
*	correctly set LocalAreaOffset of TargetFrameInfo	Rafael Espindola	2006-08-09	1	-5/+0
\| \| \| \|	llvm-svn: 29589
*	fix the spill code	Rafael Espindola	2006-08-09	1	-7/+9
\| \| \| \|	llvm-svn: 29583
*	fix the loading of the link register in emitepilogue	Rafael Espindola	2006-08-09	1	-1/+3
\| \| \| \|	llvm-svn: 29580
*	change the addressing mode of the str instruction to reg+imm	Rafael Espindola	2006-08-08	1	-4/+2
\| \| \| \|	llvm-svn: 29571
*	initial support for variable number of arguments	Rafael Espindola	2006-08-08	1	-8/+17
\| \| \| \|	llvm-svn: 29567
*	implemented sub	Rafael Espindola	2006-07-21	1	-3/+8
\| \| \| \| \| \|	correctly update the stack pointer in the prologue and epilogue llvm-svn: 29244
*	initial prologue and epilogue implementation. Need to define add and sub ↵	Rafael Espindola	2006-07-18	1	-0/+20
\| \| \| \| \| \|	before finishing it :-) llvm-svn: 29175
*	add the memri memory operand	Rafael Espindola	2006-07-11	1	-8/+18
\| \| \| \| \| \|	this makes it possible for ldr instructions with non-zero immediate llvm-svn: 29103
*	create the raddr addressing mode that matches any register and the frame index	Rafael Espindola	2006-07-10	1	-1/+1
\| \| \| \| \| \| \| \| \|	use raddr for the ldr instruction. This removes a dummy mov from the assembly output remove SelectFrameIndex remove isLoadFromStackSlot remove isStoreToStackSlot llvm-svn: 29079
*	handle the "mov reg1, reg2" case in isMoveInstr	Rafael Espindola	2006-06-27	1	-1/+1
\| \| \| \|	llvm-svn: 28945
*	initial implementation of ARMRegisterInfo::eliminateFrameIndex	Rafael Espindola	2006-06-18	1	-1/+23
\| \| \| \| \| \|	fixes test/Regression/CodeGen/ARM/ret_arg5.ll llvm-svn: 28854
*	implement movri	Rafael Espindola	2006-05-18	1	-1/+1
\| \| \| \| \| \|	add a stub LowerFORMAL_ARGUMENTS llvm-svn: 28388
*	getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.	Evan Cheng	2006-05-18	1	-0/+11
\| \| \| \|	llvm-svn: 28378
*	added a skeleton of the ARM backend	Rafael Espindola	2006-05-14	1	-0/+91
	llvm-svn: 28301