summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff options
context:
space:
mode:
authorRafael Espindola <rafael.espindola@gmail.com>2006-06-27 21:52:45 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2006-06-27 21:52:45 +0000
commitf6f5aff038741794ea4ef6c0e2ca8c817c8b3cff (patch)
tree619da763f92b86f9884dd2dd9e6952340c839fa0 /llvm/lib/Target/ARM/ARMRegisterInfo.cpp
parentca9c48852832bd4a7fc1e0c1c932cfc6205c1b27 (diff)
downloadbcm5719-llvm-f6f5aff038741794ea4ef6c0e2ca8c817c8b3cff.tar.gz
bcm5719-llvm-f6f5aff038741794ea4ef6c0e2ca8c817c8b3cff.zip
handle the "mov reg1, reg2" case in isMoveInstr
llvm-svn: 28945
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMRegisterInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
index e4ae851dd83..007b2914a13 100644
--- a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -81,7 +81,7 @@ ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
MachineBasicBlock &MBB = *MI.getParent();
MachineFunction &MF = *MBB.getParent();
- assert (MI.getOpcode() == ARM::movrr);
+ assert (MI.getOpcode() == ARM::movri);
unsigned FrameIdx = 1;
OpenPOWER on IntegriCloud