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authorRafael Espindola <rafael.espindola@gmail.com>2006-08-09 16:41:12 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2006-08-09 16:41:12 +0000
commitf5ce4755405a6584f9255610e7b403375d8637af (patch)
tree85a9ad0143be3b614f15d51db98fe46ac3e9a36a /llvm/lib/Target/ARM/ARMRegisterInfo.cpp
parent58159b36a3c545a5e67478f4bbe316b86689c41a (diff)
downloadbcm5719-llvm-f5ce4755405a6584f9255610e7b403375d8637af.tar.gz
bcm5719-llvm-f5ce4755405a6584f9255610e7b403375d8637af.zip
fix the spill code
llvm-svn: 29583
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMRegisterInfo.cpp16
1 files changed, 9 insertions, 7 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
index 9c607691eaa..ba0cd916e85 100644
--- a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -31,9 +31,8 @@ void ARMRegisterInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SrcReg, int FI,
const TargetRegisterClass *RC) const {
- // On the order of operands here: think "[FI + 0] = SrcReg".
assert (RC == ARM::IntRegsRegisterClass);
- BuildMI(MBB, I, ARM::str, 3).addFrameIndex(FI).addImm(0).addReg(SrcReg);
+ BuildMI(MBB, I, ARM::str, 3).addReg(SrcReg).addImm(0).addFrameIndex(FI);
}
void ARMRegisterInfo::
@@ -41,7 +40,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned DestReg, int FI,
const TargetRegisterClass *RC) const {
assert (RC == ARM::IntRegsRegisterClass);
- BuildMI(MBB, I, ARM::ldr, 2, DestReg).addFrameIndex(FI).addImm(0);
+ BuildMI(MBB, I, ARM::ldr, 2, DestReg).addImm(0).addFrameIndex(FI);
}
void ARMRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
@@ -81,7 +80,8 @@ ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
MachineBasicBlock &MBB = *MI.getParent();
MachineFunction &MF = *MBB.getParent();
- assert (MI.getOpcode() == ARM::ldr);
+ assert (MI.getOpcode() == ARM::ldr ||
+ MI.getOpcode() == ARM::str);
unsigned FrameIdx = 2;
unsigned OffIdx = 1;
@@ -93,6 +93,11 @@ ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
unsigned StackSize = MF.getFrameInfo()->getStackSize();
+ //<hack>
+ if (Offset < 0)
+ Offset -= 4;
+ //</hack>
+
Offset += StackSize;
assert (Offset >= 0);
@@ -121,9 +126,6 @@ void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const {
MachineFrameInfo *MFI = MF.getFrameInfo();
int NumBytes = (int) MFI->getStackSize();
- //hack
- assert(NumBytes == 0);
-
if (MFI->hasCalls()) {
// We reserve argument space for call sites in the function immediately on
// entry to the current function. This eliminates the need for add/sub
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