diff options
author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-08-08 20:35:03 +0000 |
---|---|---|
committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-08-08 20:35:03 +0000 |
commit | 8c41f99e6f175c156f1cdab4e9609ece39e2e141 (patch) | |
tree | 8add034f3c5c1110451f8603d834823bcd799249 /llvm/lib/Target/ARM/ARMRegisterInfo.cpp | |
parent | 44124236f5e47a4ce2c5c6d13afe8ece49fc827c (diff) | |
download | bcm5719-llvm-8c41f99e6f175c156f1cdab4e9609ece39e2e141.tar.gz bcm5719-llvm-8c41f99e6f175c156f1cdab4e9609ece39e2e141.zip |
change the addressing mode of the str instruction to reg+imm
llvm-svn: 29571
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterInfo.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterInfo.cpp | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp index 719ce321e0a..67d0b7c801a 100644 --- a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp @@ -135,10 +135,8 @@ void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const { //sub sp, sp, #NumBytes BuildMI(MBB, MBBI, ARM::subri, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); - //add ip, sp, #NumBytes - 4 - BuildMI(MBB, MBBI, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(NumBytes - 4); - //str lr, [ip] - BuildMI(MBB, MBBI, ARM::str, 1, ARM::R14).addReg(ARM::R12); + //str lr, [sp, #NumBytes - 4] + BuildMI(MBB, MBBI, ARM::str, 2, ARM::R14).addImm(NumBytes - 4).addReg(ARM::R13); } void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, |