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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* [ARM] Use preferred alignment for constants in promoteToConstantPool.Eli Friedman2018-09-281-1/+1
* [ARM] Share predecessor bookkeeping in CombineBaseUpdate. NFCI.Nirav Dave2018-09-251-2/+9
* [AtomicExpandPass]: Add a hook for custom cmpxchg expansion in IRAlex Bradbury2018-09-191-4/+6
* ARM: align loops to 4 bytes on Cortex-M3 and Cortex-M4.Tim Northover2018-09-131-0/+7
* [MinGW] Move code for indicating "potentially not DSO local" into shouldAssum...Martin Storsjo2018-09-041-3/+2
* [MinGW] [ARM] Add stubs for potential automatic dllimported variablesMartin Storsjo2018-08-311-3/+8
* [ARM] Lower llvm.ctlz.i32 to a libcall when clz is not available.Eli Friedman2018-08-221-1/+3
* [ARM] Handle all-ones mask explicitly in targetShrinkDemandedConstant.Eli Friedman2018-08-221-4/+11
* [AArch64] Add Tiny Code Model for AArch64David Green2018-08-221-0/+2
* [SDAG] Remove the reliance on MI's allocation strategy forChandler Carruth2018-08-141-4/+2
* [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly.Eli Friedman2018-08-141-3/+20
* Fix unused lambda capture warning from r339472.Eli Friedman2018-08-101-1/+1
* [ARM] Adjust AND immediates to make them cheaper to select.Eli Friedman2018-08-101-0/+77
* [ARM] FP16: support vector INT_TO_FP and FP_TO_INTSjoerd Meijer2018-08-081-7/+35
* [ARM] FP16: support the vector vmin and vmax variantsSjoerd Meijer2018-08-081-0/+12
* Remove trailing spaceFangrui Song2018-07-301-5/+5
* [ARM] Prefer lsls+lsrs over lsls+ands or lsrs+ands in Thumb1.Eli Friedman2018-07-251-0/+81
* ARM: stop explicitly marking armv7k libcalls as hard-float. NFC.Tim Northover2018-07-181-7/+0
* [ARM] Treat cmn immediates as legal in isLegalICmpImmediate.Eli Friedman2018-07-101-4/+6
* [NEON] Fix combining of vldx_dup intrinsics with updating of base addressesIvan A. Kosarev2018-07-051-0/+6
* [ARM] Fix PR37382: Don't optimize mul.with.overflow on thumbv6m.Vadzim Dambrouski2018-07-021-2/+6
* [NEON] Support vldNq intrinsics in AArch32 (LLVM part)Ivan A. Kosarev2018-06-271-1/+7
* [NEON] Support VST1xN intrinsics in AArch32 mode (LLVM part)Ivan A. Kosarev2018-06-101-0/+24
* [NEON] Support VLD1xN intrinsics in AArch32 mode (LLVM part)Ivan A. Kosarev2018-06-021-0/+18
* Revert r333819 "[NEON] Support VLD1xN intrinsics in AArch32 mode (Clang part)"Ivan A. Kosarev2018-06-021-18/+0
* [NEON] Support VLD1xN intrinsics in AArch32 mode (Clang part)Ivan A. Kosarev2018-06-021-0/+18
* [ARM] Remove code handling ADDC/ADDE/SUBC/SUBEAmaury Sechet2018-05-301-30/+0
* [ARM] Enable SETCCCARRY lowering for Thumb1.Eli Friedman2018-05-291-3/+1
* ARM: be conservative when asked load/store alignment of weird type.Tim Northover2018-05-211-0/+4
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-9/+8
* [ARM] Add support for SETCCCARRY instead of SETCCEAmaury Sechet2018-05-091-5/+12
* [ARM] Select result 1 from ConvertBooleanCarryToCarryFlag's result automatica...Amaury Sechet2018-05-071-4/+6
* ARM: don't try to over-align large vectors as arguments.Tim Northover2018-05-031-0/+12
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-7/+7
* [ARM] FP16 vmaxnm/vminnm scalar instructionsSjoerd Meijer2018-04-131-0/+5
* [ARM] FP16 VSEL codegenSjoerd Meijer2018-04-111-4/+10
* [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to Code...Craig Topper2018-03-291-1/+1
* [ARM] Support float literals under XOChristof Douma2018-03-281-2/+2
* Fix layering by moving ValueTypes.h from CodeGen to IRDavid Blaikie2018-03-231-1/+1
* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-1/+1
* [ARM] Support float literals under XOChristof Douma2018-03-231-12/+25
* [ARM, AArch64] Check the no-stack-arg-probe attribute for dynamic stack probesMartin Storsjo2018-03-191-0/+14
* [ARM] Support for v4f16 and v8f16 vectorsSjoerd Meijer2018-03-191-2/+7
* [ARM] FP16 codegen support for VSELSjoerd Meijer2018-03-161-0/+1
* [ARM] Fix for PR36577Sjoerd Meijer2018-03-071-8/+17
* [TLS] use emulated TLS if the target supports only this modeChih-Hung Hsieh2018-02-281-1/+1
* [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operationsPablo Barrio2018-02-281-0/+61
* [MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry2018-02-231-2/+0
* [ARM] Lower BR_CC for f16Sjoerd Meijer2018-02-201-2/+1
* [ARM] Materialise some boolean values to avoid a branchRoger Ferrer Ibanez2018-02-161-10/+89
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