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path: root/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
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* AMDGPU: Fix trying to skip from a block with no successorsMatt Arsenault2016-07-151-2/+3
* AMDGPU: Follow up to r275203Matt Arsenault2016-07-121-24/+27
* AMDGPU: Fix verifier error with kill intrinsicMatt Arsenault2016-07-121-65/+122
* Revert "AMDGPU: Remove unused control flow intrinsic"Matt Arsenault2016-07-091-0/+19
* AMDGPU: Improve offset folding for register indexingMatt Arsenault2016-07-091-22/+40
* AMDGPU: Remove unused control flow intrinsicMatt Arsenault2016-07-081-19/+0
* AMDGPU: Minor adjustment to r274817Matt Arsenault2016-07-081-1/+1
* AMDGPU: Move si_mask_branch register operand to be a useMatt Arsenault2016-07-081-4/+6
* AMDGPU: Cleanup. Use definesRegister instead of manual loopMatt Arsenault2016-07-081-6/+2
* AMDGPU: Fix return of non-void-returning shadersNicolai Haehnle2016-07-061-6/+4
* AMDGPU: Add m0 vgpr load loop block as successorMatt Arsenault2016-06-301-0/+1
* AMDGPU: Fix out of bounds indirect indexing errorsMatt Arsenault2016-06-281-8/+19
* AMDGPU: Fix verifier errors with undef vector indicesMatt Arsenault2016-06-271-27/+37
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-241-3/+4
* AMDGPU: Fix liveness when expanding m0 loopMatt Arsenault2016-06-221-17/+60
* AMDGPU: Fix verifier errors in SILowerControlFlowMatt Arsenault2016-06-221-66/+127
* AMDGPU: Also look for s_cbranch_vcczMatt Arsenault2016-05-191-1/+2
* AMDGPU: Fix crash with unreachable terminators.Matt Arsenault2016-04-291-12/+27
* AMDGPU: Add a shader calling conventionNicolai Haehnle2016-04-061-6/+4
* AMDGPU: Add SIWholeQuadMode passNicolai Haehnle2016-03-211-12/+21
* AMDGPU/SI: Fix threshold calculation for branching when exec is zeroTom Stellard2016-03-211-3/+5
* AMDGPU: add missing braces around multi-line if blockNicolai Haehnle2016-03-181-1/+2
* AMDGPU: Prevent uniform loops from becoming infiniteNicolai Haehnle2016-03-161-0/+6
* AMDGPU/SI: Incomplete shader binaries need to finish execution at the endMarek Olsak2016-03-141-0/+24
* AMDGPU: Set flat_scratch from flat_scratch_init regMatt Arsenault2016-02-121-35/+3
* AMDGPU: Initialize SILowerControlFlowMatt Arsenault2016-02-121-28/+36
* AMDGPU: Remove trailing whitespaceMatt Arsenault2016-02-121-4/+4
* AMDGPU: Fix adding redundant m0 usesMatt Arsenault2015-10-211-2/+0
* AMDGPU: Add MachineInstr overloads for instruction format testsMatt Arsenault2015-10-201-2/+2
* AMDGPU: Use explicit register size indirect pseudosMatt Arsenault2015-10-071-1/+5
* AMDGPU: Fix recomputing dominator tree unnecessarilyMatt Arsenault2015-09-251-0/+4
* AMDGPU/SI: Remove VCCRegMatt Arsenault2015-08-081-4/+4
* AMDGPU/SI: Remove EXECRegMatt Arsenault2015-08-051-8/+4
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+605
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