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path: root/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
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* Add DAG argument to canMergeStoresTo NFC.Nirav Dave2017-07-101-1/+2
* AMDGPU: Cleanup CreateLiveInRegisterMatt Arsenault2017-06-191-12/+12
* [llvm] Remove double semicolonsMandeep Singh Grang2017-06-061-1/+1
* [AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.Nirav Dave2017-05-241-0/+8
* AMDGPU: Refactor argument loweringMatt Arsenault2017-04-111-1/+1
* AMDGPU: Remove legacy bfe intrinsicsMatt Arsenault2017-04-031-2/+7
* [AMDGPU] Get address space mapping by target triple environmentYaxun Liu2017-03-271-33/+35
* AMDGPU: Cleanup fmin/fmax legacy functionMatt Arsenault2017-02-011-1/+1
* AMDGPU add support for spilling to a user sgpr pointed buffersTom Stellard2017-01-251-1/+1
* AMDGPU/R600: Serialize vector trunc stores to private ASJan Vesely2017-01-201-3/+25
* ADMGPU/EG,CM: Implement _noret global atomicsJan Vesely2017-01-161-0/+5
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-18/+18
* AMDGPU/R600: Don't use REGISTER_{LOAD,STORE} ISD nodesJan Vesely2017-01-061-149/+132
* [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What Yo...Eugene Zelenko2016-12-091-19/+34
* AMDGPU: Refactor exp instructionsMatt Arsenault2016-12-051-3/+3
* AMDGPU: Refactor kernel argument loweringTom Stellard2016-09-161-3/+5
* [CodeGen] Split out the notions of MI invariance and MI dereferenceability.Justin Lebar2016-09-111-2/+3
* AMDGPU/R600: EXTRACT_VECT_ELT should only bypass BUILD_VECTOR if the vectors ...Jan Vesely2016-09-021-1/+3
* AMDGPU/R600: Expand unaligned writes to local and global ASJan Vesely2016-09-021-2/+11
* AMDGPU/R600: Cleanup DAGCombineJan Vesely2016-08-291-15/+12
* AMDGPU/R600: Remove MergeVectorStores from legalizationJan Vesely2016-08-291-3/+0
* AMDGPU/R600: Enable Load combineJan Vesely2016-08-271-0/+1
* Replace "fallthrough" comments with LLVM_FALLTHROUGHJustin Bogner2016-08-171-3/+4
* AMDGPU/R600: Remove macrosMatt Arsenault2016-08-131-2/+2
* Fix more dereferenced end() iterators after r278532Hans Wennborg2016-08-131-0/+2
* AMDGPU/R600: Remove dead custom insertersMatt Arsenault2016-07-261-209/+1
* AMDGPU: Make AMDGPUMachineFunction fields privateMatt Arsenault2016-07-261-2/+2
* AMDGPU: Remove read_workdim intrinsicJan Vesely2016-07-251-6/+0
* AMDGPU: Delete more dead codeMatt Arsenault2016-07-221-39/+1
* AMDGPU: Fix i1 fp_to_intMatt Arsenault2016-07-221-5/+20
* AMDGPU: Fix TargetPrefix for remaining r600 intrinsicsMatt Arsenault2016-07-151-1/+1
* AMDGPU: Remove legacy rsq.clamped intrinsicMatt Arsenault2016-07-151-7/+5
* [SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, getStore,...Justin Lebar2016-07-151-13/+9
* AMDGPU/R600: Delete/rename intrinsics no longer used by mesaMatt Arsenault2016-07-141-1/+1
* AMDGPU/R600: Remove intrinsics with no tests and no usersMatt Arsenault2016-07-141-23/+1
* AMDGPU/R600: Add implicitarg.ptr intrinsicJan Vesely2016-07-101-0/+5
* CodeGen: Use MachineInstr& in TargetLowering, NFCDuncan P. N. Exon Smith2016-06-301-197/+200
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-8/+8
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-241-18/+19
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-11/+7
* AMDGPU: Cleanup load testsMatt Arsenault2016-06-021-0/+14
* AMDGPU: Cleanup lowering actionsMatt Arsenault2016-05-211-43/+38
* AMDGPU/R600: Use correct number of vector elements when lowering private loadsJan Vesely2016-05-161-5/+3
* AMDGPU/R600: Fold global address operandJan Vesely2016-05-131-0/+7
* AMDGPU/R600: Implement memory loads from constant ASJan Vesely2016-05-131-51/+12
* AMDGPU: Move R600 specific code out of AMDGPUISelLowering.cppTom Stellard2016-05-021-0/+49
* [CodeGen] Add getBuildVector and getSplatBuildVector helpers. NFCI.Ahmed Bougacha2016-04-261-11/+10
* AMDGPU: Remove custom load/store scalarizationMatt Arsenault2016-04-141-1/+1
* AMDGPU: Add a shader calling conventionNicolai Haehnle2016-04-061-1/+1
* [DAG] use isUndef() ; NFCISanjay Patel2016-03-141-4/+4
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