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path: root/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
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* [TargetLowering][AMDGPU] Make scalarizeVectorLoad return a pair of SDValues i...Craig Topper2019-12-301-1/+3
* [AMDGPU] Don't create MachinePointerInfos with an UndefValue pointerJay Foad2019-12-231-9/+3
* [NFC] Use EVT instead of bool for getSetCCInverse()Alex Richardson2019-12-131-6/+4
* [IR] Split out target specific intrinsic enums into separate headersReid Kleckner2019-12-111-0/+1
* AMDGPU: Refactor treatment of denormal modeMatt Arsenault2019-11-191-4/+2
* AMDGPU: Change boolean content type to 0 or 1Matt Arsenault2019-11-151-0/+3
* Remove duplicate MemVT to fix shadow variable warning. NFCI.Simon Pilgrim2019-11-091-1/+0
* Remove superfluous break after return. NFC.Simon Pilgrim2019-11-091-2/+0
* Fix shadow variable warning by reducing scope of CC/InverseCC CondCodes. NFCI.Simon Pilgrim2019-11-091-3/+3
* [AMDGPU] Removed dead code from R600ISelLowering.cppStanislav Mekhanoshin2019-11-051-6/+1
* [AMDGPU] Use math constants defined in MathExtras (NFC)Evandro Menezes2019-10-091-1/+2
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-1/+1
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-011-1/+1
* [TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR...Simon Pilgrim2019-06-121-5/+5
* Fix compilation warnings when compiling with GCC 7.3Alexandre Ganea2019-05-061-0/+6
* [LegalizeVectorTypes] Allow single loads and stores for more short vectorsJustin Bogner2019-03-271-6/+8
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [SelectionDAG] Add FoldBUILD_VECTOR to simplify new BUILD_VECTOR nodesSimon Pilgrim2018-10-301-16/+18
* AMDGPU: Remove remnants of old address space mappingMatt Arsenault2018-08-311-18/+18
* AMDGPU/R600: Convert kernel param loads to use PARAM_I_ADDRESSJan Vesely2018-08-011-24/+64
* Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"Matt Arsenault2018-07-201-17/+4
* Revert "AMDGPU: Fix handling of alignment padding in DAG argument lowering"Evgeniy Stepanov2018-07-141-4/+17
* AMDGPU: Fix handling of alignment padding in DAG argument loweringMatt Arsenault2018-07-131-17/+4
* AMDGPU: Refactor Subtarget classesTom Stellard2018-07-111-1/+1
* AMDGPU: Fix UBSan error caused by r335942Tom Stellard2018-07-061-1/+1
* AMDGPU: Separate R600 and GCN TableGen filesTom Stellard2018-06-281-138/+202
* AMDGPU: Remove MFI::ABIArgOffsetMatt Arsenault2018-06-281-4/+1
* AMDGPU/R600: Move intrinsics to IntrinsicsAMDGPU.tdTom Stellard2018-06-011-6/+6
* AMDGPU: Pass function directly instead of MachineFunctionMatt Arsenault2018-05-291-1/+2
* AMDGPU/R600: Remove code for handling AMDGPUISD::CLAMPTom Stellard2018-05-241-21/+0
* AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headersTom Stellard2018-05-221-0/+1
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-2/+2
* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-1/+1
* AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instructionJan Vesely2017-12-041-0/+5
* [AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environ...Yaxun Liu2017-11-101-3/+7
* AMDGPU: Fix set but not used warnings related to AMDGPUASKonstantin Zhuravlyov2017-11-011-19/+18
* Add DAG argument to canMergeStoresTo NFC.Nirav Dave2017-07-101-1/+2
* AMDGPU: Cleanup CreateLiveInRegisterMatt Arsenault2017-06-191-12/+12
* [llvm] Remove double semicolonsMandeep Singh Grang2017-06-061-1/+1
* [AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.Nirav Dave2017-05-241-0/+8
* AMDGPU: Refactor argument loweringMatt Arsenault2017-04-111-1/+1
* AMDGPU: Remove legacy bfe intrinsicsMatt Arsenault2017-04-031-2/+7
* [AMDGPU] Get address space mapping by target triple environmentYaxun Liu2017-03-271-33/+35
* AMDGPU: Cleanup fmin/fmax legacy functionMatt Arsenault2017-02-011-1/+1
* AMDGPU add support for spilling to a user sgpr pointed buffersTom Stellard2017-01-251-1/+1
* AMDGPU/R600: Serialize vector trunc stores to private ASJan Vesely2017-01-201-3/+25
* ADMGPU/EG,CM: Implement _noret global atomicsJan Vesely2017-01-161-0/+5
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-18/+18
* AMDGPU/R600: Don't use REGISTER_{LOAD,STORE} ISD nodesJan Vesely2017-01-061-149/+132
* [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What Yo...Eugene Zelenko2016-12-091-19/+34
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