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| author | Jan Vesely <jan.vesely@rutgers.edu> | 2016-08-29 22:05:06 +0000 |
|---|---|---|
| committer | Jan Vesely <jan.vesely@rutgers.edu> | 2016-08-29 22:05:06 +0000 |
| commit | 77ed6af4165d00fed4fa18d12a91acfa3af073c2 (patch) | |
| tree | 812661e575fe753ee7de737e953c85c33bb8a723 /llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | |
| parent | 2c8f1f048c97ffdeb34b8e8723e9a7369d2987ee (diff) | |
| download | bcm5719-llvm-77ed6af4165d00fed4fa18d12a91acfa3af073c2.tar.gz bcm5719-llvm-77ed6af4165d00fed4fa18d12a91acfa3af073c2.zip | |
AMDGPU/R600: Remove MergeVectorStores from legalization
This is handled by DAGCombiner in a more generic way
Differential Revision: https://reviews.llvm.org/D23970
llvm-svn: 280019
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp index d7d40a83fa6..120789ffe71 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp @@ -1116,9 +1116,6 @@ SDValue R600TargetLowering::lowerPrivateTruncStore(StoreSDNode *Store, } SDValue R600TargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const { - if (SDValue Result = AMDGPUTargetLowering::MergeVectorStore(Op, DAG)) - return Result; - StoreSDNode *StoreNode = cast<StoreSDNode>(Op); unsigned AS = StoreNode->getAddressSpace(); SDValue Value = StoreNode->getValue(); |
