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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-26 16:45:58 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-26 16:45:58 +0000 |
| commit | 52ef4019fd7f1300812dd73c2c1c755319891097 (patch) | |
| tree | 3060118b10e3b2048a1281dafededa9c974b9239 /llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | |
| parent | 07f65718bb638eddc0c40ace9e0c28cc6c6b053a (diff) | |
| download | bcm5719-llvm-52ef4019fd7f1300812dd73c2c1c755319891097.tar.gz bcm5719-llvm-52ef4019fd7f1300812dd73c2c1c755319891097.zip | |
AMDGPU: Make AMDGPUMachineFunction fields private
ABIArgOffset is a problem because properly fsetting the
KernArgSize requires that the reserved area before the
real kernel arguments be correctly aligned, which requires
fixing clover.
llvm-svn: 276766
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp index 62c02d0e990..6dd47214f95 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp @@ -1756,7 +1756,7 @@ SDValue R600TargetLowering::LowerFormalArguments( unsigned ValBase = ArgLocs[In.getOrigArgIndex()].getLocMemOffset(); unsigned PartOffset = VA.getLocMemOffset(); - unsigned Offset = 36 + VA.getLocMemOffset(); + unsigned Offset = Subtarget->getExplicitKernelArgOffset() + VA.getLocMemOffset(); MachinePointerInfo PtrInfo(UndefValue::get(PtrTy), PartOffset - ValBase); SDValue Arg = DAG.getLoad( @@ -1767,7 +1767,7 @@ SDValue R600TargetLowering::LowerFormalArguments( // 4 is the preferred alignment for the CONSTANT memory space. InVals.push_back(Arg); - MFI->ABIArgOffset = Offset + MemVT.getStoreSize(); + MFI->setABIArgOffset(Offset + MemVT.getStoreSize()); } return Chain; } |
