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path: root/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
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* [AMDGPU] Combine DPP mov with use instructions (VOP1/2/3)Valery Pykhtin2018-11-301-5/+7
* AMDGPU: Re-apply r341982 after fixing the layering issueKonstantin Zhuravlyov2018-09-121-20/+16
* Revert "AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into Targ...Ilya Biryukov2018-09-121-16/+20
* AMDGPU: Move isa version and EF_AMDGPU_MACH_* determinationKonstantin Zhuravlyov2018-09-111-20/+16
* [AMDGPU] Add support for a16 modifiear for gfx9Ryan Taylor2018-08-281-27/+10
* [AMDGPU] New tbuffer intrinsicsTim Renouf2018-08-211-10/+55
* [AMDGPU] Update assembler for HSA Code Object v3Scott Linder2018-06-211-20/+432
* AMDGPU: Refactor MIMG instruction TableGen using generic tablesNicolai Haehnle2018-06-211-36/+1
* AMDGPU: Turn D16 for MIMG instructions into a regular operandNicolai Haehnle2018-06-211-12/+19
* [AMDGPU][MC] Enabled parsing of relocations on VALU instructionsDmitry Preobrazhensky2018-06-131-2/+2
* [AMDGPU] Added checks for dpp_ctrl valueStanislav Mekhanoshin2018-05-081-23/+27
* AMDGPU: Add Vega12 and Vega20Matt Arsenault2018-04-301-4/+6
* AMDGPU: Remove max_scratch_backing_memory_byte_size from kernel headerKonstantin Zhuravlyov2018-04-091-0/+7
* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-1/+1
* [AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD InstructionDmitry Preobrazhensky2018-03-121-4/+9
* [AMDGPU][MC] Corrected GATHER4 opcodesDmitry Preobrazhensky2018-03-121-1/+26
* [AMDGPU][MC] Added lds support for MUBUF instructionsDmitry Preobrazhensky2018-02-211-1/+28
* Remove an unused function.Eric Christopher2018-02-161-4/+0
* [AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifierDmitry Preobrazhensky2018-02-051-10/+19
* [AMDGPU][MC] Added validation of d16 and r128 modifiers of MIMG opcodesDmitry Preobrazhensky2018-02-051-0/+46
* [AMDGPU][MC] Corrected parsing of image opcode modifiers r128 and d16Dmitry Preobrazhensky2018-01-291-2/+13
* [AMDGPU][MC] Added validation of image dst/data size (must match dmask and tfe)Dmitry Preobrazhensky2018-01-261-0/+61
* [AMDGPU][MC] Corrected parsing of image modifiers and encoding of image atomicsDmitry Preobrazhensky2018-01-191-6/+6
* [AMDGPU][MC][GFX9] Enable inline constants for SDWA operandsDmitry Preobrazhensky2018-01-171-4/+24
* [AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32Stanislav Mekhanoshin2018-01-151-1/+4
* [AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK supportDmitry Preobrazhensky2018-01-101-0/+16
* [AMDGPU][MC] Incorrect parsing of flat/global atomic modifiersDmitry Preobrazhensky2017-12-291-1/+39
* [AMDGPU][MC] Corrected handling of negative expressionsDmitry Preobrazhensky2017-12-221-1/+6
* [AMDGPU][MC] Corrected parsing of optional operands for ds_swizzle_b32Dmitry Preobrazhensky2017-12-221-1/+3
* [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registersDmitry Preobrazhensky2017-12-221-2/+4
* [AMDGPU, AsmParser] Enable the mnemonic spell corrector.Matt Arsenault2017-12-201-2/+15
* [AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tmaDmitry Preobrazhensky2017-12-111-0/+19
* [AMDGPU][MC][GFX9] Added support of 'inst_offset' modifier for compatibility ...Dmitry Preobrazhensky2017-11-241-2/+5
* [AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix*Dmitry Preobrazhensky2017-11-171-17/+6
* AMDGPU: Improve note directive verification in assemblerKonstantin Zhuravlyov2017-10-141-1/+19
* AMDGPU: Add support for isa version noteKonstantin Zhuravlyov2017-10-141-0/+23
* AMDGPU/NFC: Minor clean ups in HSA metadataKonstantin Zhuravlyov2017-10-111-47/+47
* AMDGPU/NFC: Minor clean ups in PAL metadataKonstantin Zhuravlyov2017-10-111-9/+13
* AMDGPU/NFC: Rename code object metadata as HSA metadataKonstantin Zhuravlyov2017-10-111-8/+8
* [Asm] Add debug tracing in table-generated assembly matcherOliver Stannard2017-10-111-2/+1
* [AMDGPU] implemented pal metadataTim Renouf2017-10-031-0/+19
* AMDGPU: Add tied operands to v_mad_mix{lo|hi}_f16Matt Arsenault2017-09-201-1/+6
* AMDGPU: Correct operand types for v_mad_mix*Matt Arsenault2017-08-301-2/+20
* [AMDGPU][MC][GFX9] Added integer clamping support for VOP3 opcodesDmitry Preobrazhensky2017-08-161-0/+24
* [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use war...Eugene Zelenko2017-08-101-20/+20
* [AMDGPU] Add pseudo "old" source to all DPP instructionsConnor Abbott2017-08-071-10/+5
* [AMDGPU][MC] Corrected VOP3 version of v_interp_* instructions for VIDmitry Preobrazhensky2017-08-071-1/+46
* [AMDGPU][MC] Enabled expressions as operandsDmitry Preobrazhensky2017-08-041-14/+12
* [AMDGPU][MC][GFX9] Added support of VOP3 'op_sel' modifierDmitry Preobrazhensky2017-07-211-4/+36
* fix typos in comments; NFCHiroshi Inoue2017-07-161-1/+1
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