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| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-11-17 15:15:40 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-11-17 15:15:40 +0000 |
| commit | 682a6547582c70702e698d6263bbf78592d66084 (patch) | |
| tree | 7ce19a45e803eec5de65081e5f9a139748e3b37a /llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | |
| parent | 6649665d5a1670a74f93b1efdc3bac6a21b6644a (diff) | |
| download | bcm5719-llvm-682a6547582c70702e698d6263bbf78592d66084.tar.gz bcm5719-llvm-682a6547582c70702e698d6263bbf78592d66084.zip | |
[AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix*
See bug 35148: https://bugs.llvm.org//show_bug.cgi?id=35148
Reviewers: tamazov, SamWot, arsenm
Differential Revision: https://reviews.llvm.org/D39492
llvm-svn: 318526
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 23 |
1 files changed, 6 insertions, 17 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 806aa420c50..cdb57508850 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -1077,10 +1077,7 @@ public: OptionalImmIndexMap &OptionalIdx); void cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands); void cvtVOP3(MCInst &Inst, const OperandVector &Operands); - void cvtVOP3PImpl(MCInst &Inst, const OperandVector &Operands, - bool IsPacked); void cvtVOP3P(MCInst &Inst, const OperandVector &Operands); - void cvtVOP3P_NotPacked(MCInst &Inst, const OperandVector &Operands); void cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands); @@ -4320,11 +4317,13 @@ void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) { cvtVOP3(Inst, Operands, OptionalIdx); } -void AMDGPUAsmParser::cvtVOP3PImpl(MCInst &Inst, - const OperandVector &Operands, - bool IsPacked) { +void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, + const OperandVector &Operands) { OptionalImmIndexMap OptIdx; - int Opc = Inst.getOpcode(); + const int Opc = Inst.getOpcode(); + const MCInstrDesc &Desc = MII.get(Opc); + + const bool IsPacked = (Desc.TSFlags & SIInstrFlags::IsPacked) != 0; cvtVOP3(Inst, Operands, OptIdx); @@ -4340,7 +4339,6 @@ void AMDGPUAsmParser::cvtVOP3PImpl(MCInst &Inst, int OpSelHiIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel_hi); if (OpSelHiIdx != -1) { - // TODO: Should we change the printing to match? int DefaultVal = IsPacked ? -1 : 0; addOptionalImmOperand(Inst, Operands, OptIdx, AMDGPUOperand::ImmTyOpSelHi, DefaultVal); @@ -4402,15 +4400,6 @@ void AMDGPUAsmParser::cvtVOP3PImpl(MCInst &Inst, } } -void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands) { - cvtVOP3PImpl(Inst, Operands, true); -} - -void AMDGPUAsmParser::cvtVOP3P_NotPacked(MCInst &Inst, - const OperandVector &Operands) { - cvtVOP3PImpl(Inst, Operands, false); -} - //===----------------------------------------------------------------------===// // dpp //===----------------------------------------------------------------------===// |
