summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
diff options
context:
space:
mode:
authorKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2017-10-11 22:18:53 +0000
committerKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2017-10-11 22:18:53 +0000
commita63b0f9d20e7200a13fe8e91786bd566ea4c1dab (patch)
treeb37858b9984eaf880111c116b0ae250823a05c7e /llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
parent17701ab5bd9e4137cbab32ea9a1ccd1e8dc2aa71 (diff)
downloadbcm5719-llvm-a63b0f9d20e7200a13fe8e91786bd566ea4c1dab.tar.gz
bcm5719-llvm-a63b0f9d20e7200a13fe8e91786bd566ea4c1dab.zip
AMDGPU/NFC: Rename code object metadata as HSA metadata
- Rename AMDGPUCodeObjectMetadata to AMDGPUMetadata (PAL metadata will be included in this file in the follow up change) - Rename AMDGPUCodeObjectMetadataStreamer to AMDGPUHSAMetadataStreamer - Introduce HSAMD namespace - Other minor name changes in function and test names llvm-svn: 315522
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 73889e6b8af..4545b9c0d21 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -41,7 +41,7 @@
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCSymbol.h"
-#include "llvm/Support/AMDGPUCodeObjectMetadata.h"
+#include "llvm/Support/AMDGPUMetadata.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
@@ -827,7 +827,7 @@ private:
bool ParseDirectiveMajorMinor(uint32_t &Major, uint32_t &Minor);
bool ParseDirectiveHSACodeObjectVersion();
bool ParseDirectiveHSACodeObjectISA();
- bool ParseDirectiveCodeObjectMetadata();
+ bool ParseDirectiveHSAMetadata();
bool ParseAMDKernelCodeTValue(StringRef ID, amd_kernel_code_t &Header);
bool ParseDirectiveAMDKernelCodeT();
bool subtargetHasRegister(const MCRegisterInfo &MRI, unsigned RegNo) const;
@@ -2398,7 +2398,7 @@ bool AMDGPUAsmParser::ParseDirectiveHSACodeObjectISA() {
return false;
}
-bool AMDGPUAsmParser::ParseDirectiveCodeObjectMetadata() {
+bool AMDGPUAsmParser::ParseDirectiveHSAMetadata() {
std::string YamlString;
raw_string_ostream YamlStream(YamlString);
@@ -2413,7 +2413,7 @@ bool AMDGPUAsmParser::ParseDirectiveCodeObjectMetadata() {
if (getLexer().is(AsmToken::Identifier)) {
StringRef ID = getLexer().getTok().getIdentifier();
- if (ID == AMDGPU::CodeObject::MetadataAssemblerDirectiveEnd) {
+ if (ID == AMDGPU::HSAMD::AssemblerDirectiveEnd) {
Lex();
FoundEnd = true;
break;
@@ -2430,12 +2430,12 @@ bool AMDGPUAsmParser::ParseDirectiveCodeObjectMetadata() {
if (getLexer().is(AsmToken::Eof) && !FoundEnd) {
return TokError(
- "expected directive .end_amdgpu_code_object_metadata not found");
+ "expected directive .end_amd_amdgpu_hsa_metadata not found");
}
YamlStream.flush();
- if (!getTargetStreamer().EmitCodeObjectMetadata(YamlString))
+ if (!getTargetStreamer().EmitHSAMetadata(YamlString))
return Error(getParser().getTok().getLoc(), "invalid code object metadata");
return false;
@@ -2517,8 +2517,8 @@ bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID) {
if (IDVal == ".hsa_code_object_isa")
return ParseDirectiveHSACodeObjectISA();
- if (IDVal == AMDGPU::CodeObject::MetadataAssemblerDirectiveBegin)
- return ParseDirectiveCodeObjectMetadata();
+ if (IDVal == AMDGPU::HSAMD::AssemblerDirectiveBegin)
+ return ParseDirectiveHSAMetadata();
if (IDVal == ".amd_kernel_code_t")
return ParseDirectiveAMDKernelCodeT();
OpenPOWER on IntegriCloud