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path: root/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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* [SelectionDAG] Widen vector results of SMULFIX/UMULFIX/SMULFIXSATBjorn Pettersson2019-08-111-0/+7
* [Strict FP] Allow custom operation actionsUlrich Weigand2019-08-061-6/+17
* [VectorLegalizer] ExpandANY_EXTEND_VECTOR_INREG/ExpandZERO_EXTEND_VECTOR_INRE...Simon Pilgrim2019-06-251-0/+26
* [Intrinsic] Signed Fixed Point Saturation Multiplication IntrinsicLeonard Chan2019-05-211-0/+1
* [SDAG] Vector op legalization for overflow opsNikita Popov2019-05-201-0/+38
* Add constrained fptrunc and fpext intrinsics.Kevin P. Neal2019-05-131-1/+3
* [LegalizeVectorOps] Remove calls to LegalizeOp on the return value from Expan...Craig Topper2019-05-101-2/+2
* [SDAG] Recursively legalize both vector mulo resultsNikita Popov2019-05-101-3/+7
* [SDAG][AArch64] Legalize VECREDUCENikita Popov2019-03-111-6/+34
* [LegalizeVectorOps] Improve the placement of ANDs in the ExpandLoad path for ...Craig Topper2019-02-221-6/+7
* [LegalizeVectorOps] Simplify the non-byte sized load handling VectorLegalizer...Craig Topper2019-02-221-11/+8
* [SDAG] Support vector UMULO/SMULONikita Popov2019-02-201-0/+16
* [Intrinsic] Unsigned Fixed Point Multiplication IntrinsicLeonard Chan2019-02-041-1/+3
* [Intrinsic] Expand SMULFIX to MUL, MULH[US], or [US]MUL_LOHI on vector argumentsLeonard Chan2019-01-311-0/+9
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Reapply "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov2019-01-151-0/+12
* Revert "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov2019-01-141-12/+0
* [CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectorsNikita Popov2019-01-141-0/+12
* [X86][AARCH64] Improve ISD::ABS supportSimon Pilgrim2019-01-121-0/+19
* [LegalizeVectorOps] Add FSHL/FSHR to the list of vector operations that shoul...Craig Topper2019-01-061-0/+2
* [TargetLowering] Add ISD::ROTL/ROTR vector expansionSimon Pilgrim2018-12-131-0/+12
* [Intrinsic] Signed Fixed Point Multiplication IntrinsicLeonard Chan2018-12-121-0/+6
* [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467)Simon Pilgrim2018-12-051-38/+50
* Remove superfluous comments. NFCI.Simon Pilgrim2018-12-051-44/+38
* [SelectionDAG][AArch64][X86] Move legalization of vector MULHS/MULHU from Leg...Craig Topper2018-11-291-0/+2
* [LegalizeVectorOps] After custom legalizing an extending load or a truncating...Craig Topper2018-11-161-2/+10
* [FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsicsCameron McInally2018-11-051-0/+8
* [SelectionDAG] Remove special methods for creating *_EXTEND_VECTOR_INREG node...Craig Topper2018-11-041-1/+1
* [LegalizeDAG] Add generic vector CTPOP expansion (PR32655)Simon Pilgrim2018-11-011-0/+13
* [FPEnv] [FPEnv] Add constrained intrinsics for MAXNUM and MINNUMCameron McInally2018-10-301-0/+4
* [Intrinsic] Signed and Unsigned Saturation Subtraction IntirnsicsLeonard Chan2018-10-291-0/+2
* [VectorLegalizer] Enable TargetLowering::expandFP_TO_UINT support.Simon Pilgrim2018-10-281-3/+16
* [TargetLowering] Improve vXi64 UINT_TO_FP vXf64 support (P38226)Simon Pilgrim2018-10-251-0/+5
* [NFC] Rename minnan and maxnan to minimum and maximumThomas Lively2018-10-241-2/+2
* [LegalizeDAG] Share Vector/Scalar CTLZ ExpansionSimon Pilgrim2018-10-231-17/+4
* [LegalizeDAG] Remove unused variableBenjamin Kramer2018-10-231-2/+0
* [LegalizeDAG] Share Vector/Scalar CTTZ ExpansionSimon Pilgrim2018-10-231-16/+4
* [Intrinsic] Unigned Saturation Addition IntrinsicLeonard Chan2018-10-221-0/+1
* DAG: Change behavior of fminnum/fmaxnum nodesMatt Arsenault2018-10-221-0/+12
* [Intrinsic] Signed Saturation Addition IntrinsicLeonard Chan2018-10-161-0/+1
* [X86][SSE] Begin removing vector CTTZ custom lowering and use LegalizeDAG ins...Simon Pilgrim2018-10-131-3/+15
* Pull out repeated value types. NFCI.Simon Pilgrim2018-10-121-3/+5
* [SelectionDAG] Move VectorLegalizer::ExpandCTLZ codegen into SelectionDAGLega...Simon Pilgrim2018-10-121-23/+4
* [LegalizeDAG] Move legalization of scatter and masked store from LegalizeVect...Craig Topper2018-10-081-11/+2
* [LegalizeVectorOps] Make ExpandStrictFPOp return the result corresponding to ...Craig Topper2018-10-071-1/+1
* [X86][LegalizeVectorOps] Use MERGE_VALUES to return two results from LowerLoa...Craig Topper2018-10-041-11/+3
* [FPEnv] Support constrained FREM intrinsicCameron McInally2018-08-201-0/+2
* Remove trailing spaceFangrui Song2018-07-301-9/+9
* Fix corruption of result number in LegalizeVectorOps.cppUlrich Weigand2018-07-251-1/+2
* [Legalize] Elide MERGE_VALUES created by scalarizeVectorLoad.Nirav Dave2018-07-231-3/+8
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