summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit message (Expand)AuthorAgeFilesLines
* [LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT legali...Craig Topper2020-01-111-3/+6
* [LegalizeVectorOps] Expand vector MERGE_VALUES immediately.Craig Topper2020-01-111-0/+11
* [LegalizeVectorOps] Remove some of the simpler Expand methods. Pass Results v...Craig Topper2020-01-111-125/+77
* [LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the Expand* a...Craig Topper2020-01-111-251/+251
* [LegalizeVectorOps] Improve handling of multi-result operations.Craig Topper2020-01-101-173/+271
* [Intrinsic] Add fixed point division intrinsics.Bevin Hansson2020-01-081-1/+15
* [LegalizeVectorOps][X86] Enable expansion of vector fp_to_uint in LegalizeVec...Craig Topper2020-01-041-1/+5
* [LegalizeVectorOps] Split most of ExpandStrictFPOp into a separate UnrollStri...Craig Topper2020-01-041-6/+13
* [LegalizeVectorOps] Pass the post-UpdateNodeOperands version of Op to ExpandL...Craig Topper2020-01-031-11/+14
* [LegalizeVectorOps][AArch64] Stop asking for v4f16 fp_round and fp_extend to ...Craig Topper2019-12-311-0/+5
* [TargetLowering][AMDGPU] Make scalarizeVectorLoad return a pair of SDValues i...Craig Topper2019-12-301-9/+1
* [X86] Enable STRICT_SINT_TO_FP/STRICT_UINT_TO_FP on X86 backendWang, Pengfei2019-12-261-3/+12
* Enable STRICT_FP_TO_SINT/UINT on X86 backendLiu, Chen32019-12-191-5/+26
* This adds constrained intrinsics for the signed and unsigned conversionsKevin P. Neal2019-12-171-13/+56
* [FPEnv] Constrained FCmp intrinsicsUlrich Weigand2019-12-071-3/+19
* [FPEnv] Add an option to disable strict float node mutating to an normalPengfei Wang2019-11-211-2/+2
* [FEnv] File with properties of constrained intrinsicsSerge Pavlov2019-11-201-54/+6
* Prune a LegacyDivergenceAnalysis and MachineLoopInfo include eachReid Kleckner2019-10-191-0/+1
* [SelectionDAG] Remove ISD::FP_ROUND_INREGCraig Topper2019-09-091-4/+0
* [Intrinsic] Add the llvm.umul.fix.sat intrinsicBjorn Pettersson2019-09-071-6/+7
* [FPEnv] Add fptosi and fptoui constrained intrinsics.Kevin P. Neal2019-08-281-2/+10
* [SelectionDAG] Widen vector results of SMULFIX/UMULFIX/SMULFIXSATBjorn Pettersson2019-08-111-0/+7
* [Strict FP] Allow custom operation actionsUlrich Weigand2019-08-061-6/+17
* [VectorLegalizer] ExpandANY_EXTEND_VECTOR_INREG/ExpandZERO_EXTEND_VECTOR_INRE...Simon Pilgrim2019-06-251-0/+26
* [Intrinsic] Signed Fixed Point Saturation Multiplication IntrinsicLeonard Chan2019-05-211-0/+1
* [SDAG] Vector op legalization for overflow opsNikita Popov2019-05-201-0/+38
* Add constrained fptrunc and fpext intrinsics.Kevin P. Neal2019-05-131-1/+3
* [LegalizeVectorOps] Remove calls to LegalizeOp on the return value from Expan...Craig Topper2019-05-101-2/+2
* [SDAG] Recursively legalize both vector mulo resultsNikita Popov2019-05-101-3/+7
* [SDAG][AArch64] Legalize VECREDUCENikita Popov2019-03-111-6/+34
* [LegalizeVectorOps] Improve the placement of ANDs in the ExpandLoad path for ...Craig Topper2019-02-221-6/+7
* [LegalizeVectorOps] Simplify the non-byte sized load handling VectorLegalizer...Craig Topper2019-02-221-11/+8
* [SDAG] Support vector UMULO/SMULONikita Popov2019-02-201-0/+16
* [Intrinsic] Unsigned Fixed Point Multiplication IntrinsicLeonard Chan2019-02-041-1/+3
* [Intrinsic] Expand SMULFIX to MUL, MULH[US], or [US]MUL_LOHI on vector argumentsLeonard Chan2019-01-311-0/+9
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Reapply "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov2019-01-151-0/+12
* Revert "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov2019-01-141-12/+0
* [CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectorsNikita Popov2019-01-141-0/+12
* [X86][AARCH64] Improve ISD::ABS supportSimon Pilgrim2019-01-121-0/+19
* [LegalizeVectorOps] Add FSHL/FSHR to the list of vector operations that shoul...Craig Topper2019-01-061-0/+2
* [TargetLowering] Add ISD::ROTL/ROTR vector expansionSimon Pilgrim2018-12-131-0/+12
* [Intrinsic] Signed Fixed Point Multiplication IntrinsicLeonard Chan2018-12-121-0/+6
* [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467)Simon Pilgrim2018-12-051-38/+50
* Remove superfluous comments. NFCI.Simon Pilgrim2018-12-051-44/+38
* [SelectionDAG][AArch64][X86] Move legalization of vector MULHS/MULHU from Leg...Craig Topper2018-11-291-0/+2
* [LegalizeVectorOps] After custom legalizing an extending load or a truncating...Craig Topper2018-11-161-2/+10
* [FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsicsCameron McInally2018-11-051-0/+8
* [SelectionDAG] Remove special methods for creating *_EXTEND_VECTOR_INREG node...Craig Topper2018-11-041-1/+1
* [LegalizeDAG] Add generic vector CTPOP expansion (PR32655)Simon Pilgrim2018-11-011-0/+13
OpenPOWER on IntegriCloud