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| author | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2019-08-11 19:27:06 +0000 |
|---|---|---|
| committer | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2019-08-11 19:27:06 +0000 |
| commit | 27038a3780606cd6b7a0f122586643f21506c38f (patch) | |
| tree | 66fd79c0eb7a76c83a7d32640cd129836660551b /llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | |
| parent | 10234da71d6aab25c82b1913829fed6ae3b408cc (diff) | |
| download | bcm5719-llvm-27038a3780606cd6b7a0f122586643f21506c38f.tar.gz bcm5719-llvm-27038a3780606cd6b7a0f122586643f21506c38f.zip | |
[SelectionDAG] Widen vector results of SMULFIX/UMULFIX/SMULFIXSAT
Summary:
After the commits that changed x86 backend to widen vectors
instead of using promotion some of our downstream tests
started to fail. It was noticed that WidenVectorResult has
been missing support for SMULFIX/UMULFIX/SMULFIXSAT. This
patch adds the missing functionality.
Reviewers: craig.topper, RKSimon
Reviewed By: craig.topper
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66051
llvm-svn: 368540
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index 09b22215173..a892fccc8a1 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -831,6 +831,13 @@ SDValue VectorLegalizer::Expand(SDValue Op) { case ISD::SMULFIX: case ISD::UMULFIX: return ExpandFixedPointMul(Op); + case ISD::SMULFIXSAT: + // FIXME: We do not expand SMULFIXSAT here yet, not sure why. Maybe it + // results in worse codegen compared to the default unroll? This should + // probably be investigated. And if we still prefer to unroll an explanation + // could be helpful, otherwise it just looks like something that hasn't been + // "implemented" yet. + return DAG.UnrollVectorOp(Op.getNode()); case ISD::STRICT_FADD: case ISD::STRICT_FSUB: case ISD::STRICT_FMUL: |
