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* Axone tp_chiplet_init sequence in bootRaja Das2018-10-011-29/+90
* STOP:Dont clear pmc_pcb_intr_type0_pending in OISR1/OIMR1 registerPrasad Bg Ranganath2018-09-271-15/+26
* Back out p9a_10 engd that breaks the initcompiler.Ben Gass2018-09-271-0/+18
* Mask early hang indicators from nmmu/vas unitJenny Huynh2018-09-261-4/+4
* Support ATTR_LPC_CONSOLE_CNFG attributeSachin Gupta2018-09-262-0/+15
* Update p9a_10 engd from o10_e9018_1_tp018_ec409_soa_sc_u261_01Ben Gass2018-09-241-18/+0
* Only call lpc init procedure on slave procs in mnfg modeSachin Gupta2018-09-242-2/+30
* Attribute cleanupDan Crowell2018-09-212-98/+30
* Support 1byte data access on LPCspashabk-in2018-09-212-6/+40
* Simics check in case of spless system before modifying HRMOR to 4GBRaja Das2018-09-211-1/+1
* FBC ABUS TDM inject and recovery HWPsJoe McGill2018-09-201-1/+4
* Move lpc_rw to a source filespashabk-in2018-09-193-66/+83
* Register 1020019 was white listedmanichow2018-09-191-0/+1
* Updated core stop state while capturing data in MPIPLRaja Das2018-09-181-69/+110
* RAS_XML: updates to sync the XML with actual values from hardwareZane Shelley2018-09-172-1/+19
* Remove intermediate rule for C/c filesSachin Gupta2018-09-171-10/+4
* IPL/STOP: Disable LCO when only two EXes are configuredYue Du2018-09-171-13/+1
* Jenkins parallel buildspashabk-in2018-09-172-3/+3
* Move Control instruction to seepromspashabk-in2018-09-171-1/+1
* Enable parallel builds in SBEspashabk-in2018-09-163-69/+60
* Adds endian_swap to fapi2Stephen Glancy2018-09-161-0/+27
* SW427193 / HW461448: Enable memory controller watJenny Huynh2018-09-121-0/+21
* Revert "UV Support : Augmented STOP API and self restore for enabling UV"Prem Shanker Jha2018-09-121-24/+0
* Axone only-IPL Procedures update to support SBE changesAbhishek Agarwal2018-09-104-35/+219
* Axone only-Mux settings for TOD refclk inputAnusha Reddy Rangareddygari2018-09-101-0/+13
* Fix forced-trace commandspashabk-in2018-09-101-2/+2
* Release sbe binaries as part of simics tarspashabk-in2018-09-101-0/+2
* get FAPI_POS for all valid target types passed in SBE FIFO ffdcRichard J. Knight2018-09-071-1/+3
* Initf procedure updates for Axone OMI ringsAnusha Reddy Rangareddygari2018-09-073-2/+83
* p9_sbe_lpc_init: Skip final error check for Fleetwood GA1Joachim Fenkes2018-09-071-0/+2
* Revert "Initf procedure updates for OMI rings for Axone"Jennifer A. Stofer2018-09-073-65/+2
* Initf procedure updates for OMI rings for AxoneAnusha Reddy Rangareddygari2018-09-073-2/+65
* Infrastructure support for new MC OMI rings for AxoneClaus Michael Olsen2018-09-063-19/+80
* UV Support : Augmented STOP API and self restore for enabling ultravisor.Prem Shanker Jha2018-09-061-0/+24
* Modify the getFfdc routine to consider the SBE procRichard J. Knight2018-09-062-10/+56
* Secure Boot: Whitelist PPE External Interface XCR and SMP lane related registerNick Bofferding2018-09-051-0/+2
* PM:Some more cleanups in update_ec_eq procedure for core unit xstop casePrasad Bg Ranganath2018-08-314-0/+79
* [SBE-ARCH1]HRMOR relocated to 4Gb for SPLess Opal systemRaja Das2018-08-302-12/+27
* Add TLBIE WATNick Klazynski2018-08-291-0/+17
* prevent NVDL recal_abort to OBUS PHY during SMP usageJoe McGill2018-08-291-12/+28
* Revert "lpc_init: Correct LPC host controller timeout value"Jennifer A. Stofer2018-08-291-1/+1
* lpc_init: Correct LPC host controller timeout valueJoachim Fenkes2018-08-291-1/+1
* Enable Core compatability Mode; Add HW443669Nick Klazynski2018-08-291-0/+41
* Use core target for HRMOR/URMOR scoms in p9_sbe_load_bootloaderDean Sanner2018-08-291-2/+2
* nest updates for p9c DD1.3 native and p9c DD1.2 compatibility modesJoe McGill2018-08-293-14/+36
* Updates to permit synchronized SS PLL spreading via TODJoe McGill2018-08-294-14/+76
* SMF: SBE updates for SMF (URMOR set and CPMMR[Runtime Wakeup Mode] clear)Greg Still2018-08-294-28/+93
* Add hook to setup ATTR_SMF_CONFIGDean Sanner2018-08-281-0/+7
* Add prototype for releasing platform data pointer storage functionRichard J. Knight2018-08-282-4/+14
* Introducing lpc utils source filespashabk-in2018-08-282-0/+26
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