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author | spashabk-in <shakeebbk@in.ibm.com> | 2018-08-13 01:53:21 -0500 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-09-19 20:38:25 -0500 |
commit | ff74130fcca2fb5f83739ca03f7b310ea8356c36 (patch) | |
tree | 8f4222ab63b47905843048af079595eb05d4bb32 /src | |
parent | 2bdc2af078a71df80da17e636130abb2d5d37455 (diff) | |
download | talos-sbe-ff74130fcca2fb5f83739ca03f7b310ea8356c36.tar.gz talos-sbe-ff74130fcca2fb5f83739ca03f7b310ea8356c36.zip |
Move lpc_rw to a source file
Moving lpc_rw to its source file to avoid code duplication
if more than one file includes lpc_utils.H.
This is mainly required by SBE to use lpc_rw
for virtual PNOR access.
Change-Id: I7de30bcbae932307e0b63d8d42ae6ce050753339
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64296
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64309
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src')
3 files changed, 83 insertions, 66 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.C b/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.C index 6b289039..a3e6bd18 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.C @@ -22,3 +22,75 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ +#include "p9_lpc_utils.H" + +#include "p9_perv_scom_addresses.H" +#include "p9_perv_scom_addresses_fld.H" +#include "p9_misc_scom_addresses.H" +#include "p9_misc_scom_addresses_fld.H" + +fapi2::ReturnCode lpc_rw( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, + const uint32_t i_addr, + const bool i_read_notwrite, + const bool i_generate_ffdc, + fapi2::buffer<uint32_t>& io_data) +{ + const int l_bit_offset = (i_addr & 4) << 3; + fapi2::buffer<uint64_t> l_command; + l_command.writeBit<PU_LPC_CMD_REG_RNW>(i_read_notwrite) + .insertFromRight<PU_LPC_CMD_REG_SIZE, PU_LPC_CMD_REG_SIZE_LEN>(0x4) + .insertFromRight<PU_LPC_CMD_REG_ADR, PU_LPC_CMD_REG_ADR_LEN>(i_addr); + FAPI_TRY(fapi2::putScom(i_target_chip, PU_LPC_CMD_REG, l_command), "Error writing LPC command register"); + + if (!i_read_notwrite) + { + fapi2::buffer<uint64_t> l_data; + l_data.insert(io_data, l_bit_offset, 32); + FAPI_TRY(fapi2::putScom(i_target_chip, PU_LPC_DATA_REG, l_data), "Error writing LPC data"); + } + + { + fapi2::buffer<uint64_t> l_status; + int timeout = LPC_CMD_TIMEOUT_COUNT; + + while (timeout--) + { + FAPI_TRY(fapi2::getScom(i_target_chip, PU_LPC_STATUS_REG, l_status), "Error reading LPC status"); + + if (l_status.getBit<PU_LPC_STATUS_REG_DONE>()) + { + break; + } + + fapi2::delay(LPC_CMD_TIMEOUT_DELAY_NS, LPC_CMD_TIMEOUT_DELAY_CYCLE); + } + + if (i_generate_ffdc) + { + FAPI_ASSERT(l_status.getBit<PU_LPC_STATUS_REG_DONE>(), fapi2::LPC_ACCESS_TIMEOUT() + .set_TARGET_CHIP(i_target_chip) + .set_COUNT(LPC_CMD_TIMEOUT_COUNT) + .set_COMMAND(l_command) + .set_DATA(io_data) + .set_STATUS(l_status), + "LPC access timed out"); + } + else if (!l_status.getBit<PU_LPC_STATUS_REG_DONE>()) + { + return fapi2::RC_LPC_ACCESS_TIMEOUT; + } + } + + if (i_read_notwrite) + { + fapi2::buffer<uint64_t> l_data; + FAPI_TRY(fapi2::getScom(i_target_chip, PU_LPC_DATA_REG, l_data), "Error reading LPC data"); + l_data.extract(io_data, l_bit_offset, 32); + } + + return fapi2::FAPI2_RC_SUCCESS; + +fapi_try_exit: + return fapi2::current_err; +} diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H b/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H index eee60806..dcf452ad 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H @@ -29,85 +29,31 @@ #ifndef P9_LPC_UTILS_H_ #define P9_LPC_UTILS_H_ +#include "fapi2.H" + const uint32_t LPC_CMD_TIMEOUT_DELAY_NS = 1000000; const uint32_t LPC_CMD_TIMEOUT_DELAY_CYCLE = 1000000; const uint32_t LPC_CMD_TIMEOUT_COUNT = 20; -static fapi2::ReturnCode lpc_rw( +fapi2::ReturnCode lpc_rw( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, - uint32_t i_addr, bool i_read_notwrite, fapi2::buffer<uint32_t>& io_data) -{ - const int l_bit_offset = (i_addr & 4) << 3; - fapi2::buffer<uint64_t> l_command; - l_command.writeBit<PU_LPC_CMD_REG_RNW>(i_read_notwrite) - .insertFromRight<PU_LPC_CMD_REG_SIZE, PU_LPC_CMD_REG_SIZE_LEN>(0x4) - .insertFromRight<PU_LPC_CMD_REG_ADR, PU_LPC_CMD_REG_ADR_LEN>(i_addr); - FAPI_TRY(fapi2::putScom(i_target_chip, PU_LPC_CMD_REG, l_command), "Error writing LPC command register"); - - if (!i_read_notwrite) - { - fapi2::buffer<uint64_t> l_data; - l_data.insert(io_data, l_bit_offset, 32); - FAPI_TRY(fapi2::putScom(i_target_chip, PU_LPC_DATA_REG, l_data), "Error writing LPC data"); - } - - { - fapi2::buffer<uint64_t> l_status; - int timeout = LPC_CMD_TIMEOUT_COUNT; - - while (timeout--) - { - FAPI_TRY(fapi2::getScom(i_target_chip, PU_LPC_STATUS_REG, l_status), "Error reading LPC status"); - - if (l_status.getBit<PU_LPC_STATUS_REG_DONE>()) - { - break; - } - - fapi2::delay(LPC_CMD_TIMEOUT_DELAY_NS, LPC_CMD_TIMEOUT_DELAY_CYCLE); - } - - if (LPC_UTILS_TIMEOUT_FFDC) - { - FAPI_ASSERT(l_status.getBit<PU_LPC_STATUS_REG_DONE>(), fapi2::LPC_ACCESS_TIMEOUT() - .set_TARGET_CHIP(i_target_chip) - .set_COUNT(LPC_CMD_TIMEOUT_COUNT) - .set_COMMAND(l_command) - .set_DATA(io_data) - .set_STATUS(l_status), - "LPC access timed out"); - } - else if (!l_status.getBit<PU_LPC_STATUS_REG_DONE>()) - { - return fapi2::RC_LPC_ACCESS_TIMEOUT; - } - } - - if (i_read_notwrite) - { - fapi2::buffer<uint64_t> l_data; - FAPI_TRY(fapi2::getScom(i_target_chip, PU_LPC_DATA_REG, l_data), "Error reading LPC data"); - l_data.extract(io_data, l_bit_offset, 32); - } - - return fapi2::FAPI2_RC_SUCCESS; - -fapi_try_exit: - return fapi2::current_err; -} + const uint32_t i_addr, + const bool i_read_notwrite, + const bool i_generate_ffdc, + fapi2::buffer<uint32_t>& io_data); static inline fapi2::ReturnCode lpc_read( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, - uint32_t i_addr, fapi2::buffer<uint32_t>& o_data) + uint32_t i_addr, fapi2::buffer<uint32_t>& o_data, bool i_generate_ffdc = true) { - return lpc_rw(i_target_chip, i_addr, true, o_data); + return lpc_rw(i_target_chip, i_addr, true, i_generate_ffdc, o_data); } static inline fapi2::ReturnCode lpc_write( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, - uint32_t i_addr, fapi2::buffer<uint32_t> i_data) + uint32_t i_addr, fapi2::buffer<uint32_t> i_data, bool i_generate_ffdc = true) { - return lpc_rw(i_target_chip, i_addr, false, i_data); + return lpc_rw(i_target_chip, i_addr, false, i_generate_ffdc, i_data); } #endif /* P9_LPC_UTILS_H_ */ diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C index 155d2577..9d73e689 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C @@ -44,7 +44,6 @@ #include "p9_misc_scom_addresses.H" #include "p9_misc_scom_addresses_fld.H" -const bool LPC_UTILS_TIMEOUT_FFDC = true; #include "p9_lpc_utils.H" static fapi2::ReturnCode switch_lpc_clock_mux( |