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* Move lpc_rw to a source filespashabk-in2018-09-193-66/+83
* Register 1020019 was white listedmanichow2018-09-191-0/+1
* RAS_XML: updates to sync the XML with actual values from hardwareZane Shelley2018-09-172-1/+19
* IPL/STOP: Disable LCO when only two EXes are configuredYue Du2018-09-171-13/+1
* Adds endian_swap to fapi2Stephen Glancy2018-09-161-0/+27
* SW427193 / HW461448: Enable memory controller watJenny Huynh2018-09-121-0/+21
* Revert "UV Support : Augmented STOP API and self restore for enabling UV"Prem Shanker Jha2018-09-121-24/+0
* Axone only-IPL Procedures update to support SBE changesAbhishek Agarwal2018-09-104-35/+219
* Axone only-Mux settings for TOD refclk inputAnusha Reddy Rangareddygari2018-09-101-0/+13
* get FAPI_POS for all valid target types passed in SBE FIFO ffdcRichard J. Knight2018-09-071-1/+3
* Initf procedure updates for Axone OMI ringsAnusha Reddy Rangareddygari2018-09-073-2/+83
* p9_sbe_lpc_init: Skip final error check for Fleetwood GA1Joachim Fenkes2018-09-071-0/+2
* Revert "Initf procedure updates for OMI rings for Axone"Jennifer A. Stofer2018-09-073-65/+2
* Initf procedure updates for OMI rings for AxoneAnusha Reddy Rangareddygari2018-09-073-2/+65
* Infrastructure support for new MC OMI rings for AxoneClaus Michael Olsen2018-09-063-19/+80
* UV Support : Augmented STOP API and self restore for enabling ultravisor.Prem Shanker Jha2018-09-061-0/+24
* Modify the getFfdc routine to consider the SBE procRichard J. Knight2018-09-062-10/+56
* Secure Boot: Whitelist PPE External Interface XCR and SMP lane related registerNick Bofferding2018-09-051-0/+2
* PM:Some more cleanups in update_ec_eq procedure for core unit xstop casePrasad Bg Ranganath2018-08-314-0/+79
* Add TLBIE WATNick Klazynski2018-08-291-0/+17
* prevent NVDL recal_abort to OBUS PHY during SMP usageJoe McGill2018-08-291-12/+28
* Revert "lpc_init: Correct LPC host controller timeout value"Jennifer A. Stofer2018-08-291-1/+1
* lpc_init: Correct LPC host controller timeout valueJoachim Fenkes2018-08-291-1/+1
* Enable Core compatability Mode; Add HW443669Nick Klazynski2018-08-291-0/+41
* Use core target for HRMOR/URMOR scoms in p9_sbe_load_bootloaderDean Sanner2018-08-291-2/+2
* nest updates for p9c DD1.3 native and p9c DD1.2 compatibility modesJoe McGill2018-08-293-14/+36
* Updates to permit synchronized SS PLL spreading via TODJoe McGill2018-08-294-14/+76
* SMF: SBE updates for SMF (URMOR set and CPMMR[Runtime Wakeup Mode] clear)Greg Still2018-08-294-28/+93
* Add prototype for releasing platform data pointer storage functionRichard J. Knight2018-08-282-4/+14
* Introducing lpc utils source filespashabk-in2018-08-281-0/+24
* HCODE Make divide using DERP/DORP atomicDouglas Gilbert2018-08-231-1/+7
* Avoid enabling smf bits in nmmu logic for P9Jenny Huynh2018-08-111-17/+0
* apply INT ARX clock gate disable to p9n DD2.0 hardwareJoe McGill2018-08-061-1/+1
* PM: Prevent Core-L2 Quiesce from removing PM_EXIT upon SPWUYue Du2018-08-011-1/+11
* Validate OBUS DL lane failed indications during initial link trainingJoe McGill2018-07-311-1/+2
* Disable HW439321 workaround in dd1.3Adam Hale2018-07-311-0/+17
* Enable CDD1.3's 4 risklevels (step 1)Nick Klazynski2018-07-271-6/+64
* p9_sbe_lpc_init: Improve resetJoachim Fenkes2018-07-272-13/+17
* Remove ATTR_PROC_CHIP_MEM_TO_USEDan Crowell2018-07-271-12/+0
* Add MEM_PORT targetAndre Marin2018-07-272-2/+5
* Initf procedure updates for CumulusAnusha Reddy Rangareddygari2018-07-272-4/+121
* Handling special wakeup assert/deassert mis-match in PM Reset/Init on MALFAmit Tendolkar2018-07-222-4/+16
* p9.pci.scan.initfile -- replace 62028 implementation with initfile entryJoe McGill2018-07-192-111/+0
* STOP: remove chiplet enable drop in core_poweron for multicast scomYue Du2018-07-181-4/+1
* p9_sbe_scominit -- set XSCOM BAR in secure memory with SMF enabledJoe McGill2018-07-183-0/+30
* Avoid spurious Malf Alert (HMI) to PHYP in PM Complex Reset/SuspendAmit Tendolkar2018-07-131-0/+7
* Clockgate disable workaround for HW452921Nick Klazynski2018-07-131-3/+3
* Cleanup: Updated Mvpd access function and removal of unused ringsClaus Michael Olsen2018-07-133-18/+13
* Marking CME sram addr and cntrl register for whitelistPrasad Bg Ranganath2018-07-131-0/+4
* Secure memory allocation and setupJenny Huynh2018-07-129-16/+249
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