| Commit message (Collapse) | Author | Age | Files | Lines |
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Current FW uses option2 (alternate MCD configuration) to workaround
HW423589 for p9n DD2.1 hardware, which is desired for OP releases
supporting GPUs.
This commit adjusts the DD2.1 solution to option1 instead,
and can be cherry-picked into the enterprise release branches to
remove the per-socket memory resrictions which come as a side effect
of the current option2 setup.
Change-Id: I24ecf918a81964a3df6b1e3e18e60375d7646b45
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69718
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69845
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Mask nmmu internal timeout checkers to allow higher-level
timeouts to handle proc callouts.
Change-Id: I4484cd94666e0335bcc2169ffd9c9ab8dce4335a
CQ:SW447361
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67020
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67028
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Masking nmmucqfir(1) and vasfir(15) since they are unit-level
indicators of early hang. This will allow pbcentfir(9) to handle
the reporting of any early hang conditions.
Change-Id: I86acb2d781a6653d9d8c8622ed80da426fa66452
CQ: SW446662
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66492
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Daniel J. Henderson <hende@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66499
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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No secure accelerators in P9, so avoid enabling nmmu smf bits
that will otherwise cause sm table walk hangs. Nmmu will gate off addr15
when mm_cfg_xlat_ctl_urmor(0:2)=0b000.
Change-Id: Ib008d6be5d32f45ebb2b66600e45828decf6fbf4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64064
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Emmanuel Sacristan <esacris@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64070
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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p9_mss_eff_grouping.C:
- determines whether secure mem is requested, reserves smf space
- always reserve smf at end of range because of end-of-range bit
- set addr15 when reporting smf base address
- mask off group_id(0) via chip address extension if smf is enabled
- updated to set value of attr_smf_enabled
- enhanced error reporting with smf config/supported values
- made values reported to attr_mss_mcs_group_32 more clear
p9_mss_setup_bars.C:
- set MCFGPA/MCFGPMA registers with SMF data
- fixed scom registers for MCFGPA/MCFGPMA hole setup
- added note to leave MCFIR_invalid_smf masked for HW451708/HW451711
- added assert to check for HOLE1 and SMF enable overlaps
p9_query_mssinfo.C:
- updated to print out SMF reservations
- print out HTM/OCC/SMF reservations regardless of mirroring enable
p9_fbc_utils.C:
- prevent group_id(0)=1 from affecting mappable memory ranges
p9_sbe_fabricinit.C:
- mask off group_id(0) via chip address extension if smf is enabled
p9_setup_sbe_config.C, p9_sbe_attr_setup.C:
- use scratch_reg6 bit(16) to pass smf_config value
initfiles:
- removed setup to use other addr bits as secure bit; core only uses addr15
- added setup for ncu addr15 value in hcode
- always set addr15 config bit in bridge unit if smf is supported
- set addr15 bit across all mcs if smf is enabled
- added in settings to enable smf in nmmu unit
- hardcode group_id(0) bit in chipext mask for bridge unit if smf is supported
attributes:
- ATTR_SMF_ENABLE is a system level attribute
- changed SMF_ENABLE->SMF_CONFIG; smf_enabled will be (config && supported)
CQ:HW451708
CQ:HW451711
Change-Id: I6cf85600354baa322e959c922f596ecc5c68a458
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57322
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
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Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57347
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Change-Id: I6ec5550871bcdbab64749bd90f2f8bf4354fd2b8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58400
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58568
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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CMVC-Prereq: 1051830
Change-Id: I21b0d9187443f2727f83df310bca2fb3ae0fd80c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55376
Dev-Ready: Matt K. Light <mklight@us.ibm.com>
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Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56834
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Also initial mk files for p9n 2.3, but p9c 1.2 will be first.
Change-Id: Ia73aba37be5bcf64b1b2cfe5b1ed153b189c7777
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53909
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Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54542
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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The original patch: https://ralgit01.raleigh.ibm.com/gerrit1/#/c/45266/
was merged prematurely.
It was reverted in: https://ralgit01.raleigh.ibm.com/gerrit1/#/c/50703/
pre-commit-actions updated to call code-beautifier twice. Some generated
code for initfiles changes between first and second passes.
Change-Id: I25bdc2ceaf9636a2f6559775bc8cb9616848c9d7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50741
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50961
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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chip_ec_attributes.xml
add ATTR_CHIP_EC_FEATURE_HW423589_OPTION1, defines set of chips which need
MCD disable for HW423589 (applied to Nimbus EC20 and 22+)
p9.cxa.scom.initfile
p9.int.scom.initfile
p9.l2.scan.initfile
p9.l3.scan.initfile
p9.mmu.scom.initfile
p9.ncu.scan.initfile
p9.npu.scom.initfile
p9.nx.scom.initfile
p9.trace.scan.initfile
p9.vas.scom.initfile
p9_pcie_config.C
set unit scope disable dials
p9_sbe_scominit.C
p9_pm_pba_init.C
set PBA unit scope disable dial
p9_pm_set_homer_bar.C
change PBA0 default command scope from GROUP to NODAL
p9.fbc.ab_hp.scom.initfile
disable group master setup
p9_setup_bars.C
p9_setup_bars_defs.H
skip MCD setup for HW423589_OPTION1
cmvc-prereq: 1043014
Change-Id: I402701bdd3266e19dbbe8c717b8a54942e3c9ee2
CQ: HW423589
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48961
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48963
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>
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This reverts commit 41352b2d444e98639eedc06b1eb0d8da89d4adb3.
Change-Id: Ic3f2099eff3f5c942ef8fb6916e8ee78ca1a9e82
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50703
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Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50722
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Adding CTEPERLPATH to ENV-setup
Jenkins failure CQ SW40996
Change-Id: I02a9c5f31fb0545e8f8c8cd99b528a467ae52cf8
CQ: SW409966
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45266
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Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50688
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Change-Id: If9ffe53acd009c1520cdd7f162e88fd235799225
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46361
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48896
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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- chips.env.mk
- makefile changes for CME,PGPE and SGPE
Change-Id: I7086a08de6d2b53d8051f64bed01fe525183aacd
RTC:179165
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45289
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Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45432
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Dial getting overwritten by a global dial; moving both to scan inits
Change-Id: Ia16a78c146b88f21325a4b1e619a5bf4df5328d7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45306
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Dev-Ready: Emmanuel Sacristan <esacris@us.ibm.com>
Reviewed-by: JAKE C. TRUELOVE <jtruelove@us.ibm.com>
Dev-Ready: JAKE C. TRUELOVE <jtruelove@us.ibm.com>
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45311
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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p9_mmu_scom is called in p9_sbe_scominit, but ATTR_PROC_EPS_WRITE_CYCLES_T1/2
does not get set until later in the IPL sequence.
Moving initialization of mmu write epsilon values to p9_chiplet_scominit.C
Change-Id: Ibf325fc4b132070b95ea3f55b92090109ab30406
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43210
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Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43214
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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fir_nmmufir.xml:
bit 9: recoverable, self_th_1
bit 10: mask
fir_nmmucqfir.xml
bit 4 - recoverable, self_th_1
bit 5 - masked
bit 11 - recoverable, threshold_and_mask
bit 15 - recoverable, threshold_and_mask
bit 29 - masked
bit 37 - recoverable, self_th_1
bit 45 - masked
rebase to pick up changes for HW414700, apply for DD2.0 only
Change-Id: I1164cefddab6ba693050dd07b10ffc8e28ae586b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42953
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Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42956
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Change-Id: I93f995e1c63f376906efc2bad24aa2c5728702fb
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42934
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43113
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Core
ECP.PC.FIR.THRESHOLD_RESET = 0b00 to disable
CXA, L2, L3, NMMU, NX, VAS, FBC, MC FIR changes to checkstop on UE at source
Change-Id: I4400acb7d3ec68cced49adb5a77fec7bd8356d40
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42887
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42942
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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- Update *.mk files to support p9c chip ID
- Workaround some spy issues p9c 10 engd issues
- Fix bug to allow compilation without ENGD
Change-Id: Ie94b55c93081108668725d3ee9b88bd34eaa794f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40904
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40952
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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redefine EC feature attributes, using inverse logic where required, to qualify
inits specific to P9N DD1 where possible, to eliminate need for updates for
future chips in plan
attempt to remove usage of generic P9N_DD1_SPY_NAMES and P9N_DD2_SPY_NAMES
attributes added to support initial P9NDD2 engineering data -- several spies
were not being set as a result
-----------------
initfile updates:
-----------------
p9.cme.scan.initfile
add HW391162, SCAN_SICR_TLBIE_QUIESCE feature attributes
p9.core.common.scan.initfile
remove fused core init, it was applying scan default for P9N DD1 and is
not needed for P9N DD2+ given fuse controls
p9.core.scan.initfile
add CORE_P9NDD1 to qualify P9N DD1 specific register hierarchy and
dial programming
replace usage of P9N_DD1_SPY_NAMES, P9N_DD2_SPY_NAMES using CORE_P9NDD1
and inverse, to pick up initial pass at P9C DD1 inits
p9.cxa.scom.initfile
add CXA_P9NDD1_SPY_NAMES to qualify P9N DD1 specific register hierarchy
p9.ddrphy.scom.initfile
add DDRPHY_P9NDD1_SPY_NAMES to qualify P9N DD1 specific register hierarchy
p9.dpll.scan.initfile
remove POSTDD1N_DPLL_SETTINGS feature attribute, use DD1_DPLL_SETTINGS
attribute and inverse to drive inits
p9.l2.scan.initfile
invert definition of OPTIMAL_LARX_STCX_PERF, HW409069 feature attributes
p9.l3.scan.initfile
p9.l3.scom.initifle
remove OPTIMAL_LCO_SCOM, HW396230_SCOM feature attributes
use HW386657, HW396230 attributes to drive inits
p9.mca.scom.initfile
add MCA_P9NDD1_ASYNC to differentiate asynchronous boundary crossing
programming and dial name differences between P9N DD1, P9N DD2
p9.mmu.scan.initfile
p9.mmu.scom.initfile
invert definition of NMMU_DMT_DD2, NMMU_ISS734_DD2_1 feature attributes
p9.ncu.scan.initfile
p9.ncu.scom.initifle
remove HW396230_SCOM, use HW396230 attribute to drive inits
p9.npu.scom.initfile
remove usage of P9N_DD1_SPY_NAMES, refactor CONFIG_ENABLE_PBUS specification
to work for both P9NDD1, P9NDD2 ENGD
p9.obus.scan.initfile
remove EC qualification of OBUS FIR mask for simulation
sample.ec.scan.initfile
remove testcase requiring use of P9N_DD1_SPY_NAMES, properties of
testcase are covered by other tests
-----------------
HWP updates:
-----------------
p9_xip_customize
add customization of epsilon attributes for NMMU application
p9_chiplet_scominit
invert definition of P9_NDL_IOVALID feature attribute
remove usage of P9N_DD1_SPY_NAMES
p9_npu_scominit
replace usage of P9N_DD1_SPY_NAMES with SETUP_BARS_NPU_DD1_ADDR
p9_sbe_tracearray
invert definition of CORE_TRACE_SCOMABLE feature attribute
p9_sim_get_nia
remove usage of P9N_DD1_SPY_NAMES, directly process CT/EC attributes
(ok as this HWP is used for VBU sim only and not consumed by FW)
Change-Id: I63bfe8a4bfb8824b94e35a3688a6c69eecc1cf01
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40911
Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com>
Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40915
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Change-Id: I4a60be950fd5866a15f4c69f2c587a60b5620a2c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40389
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40392
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Change-Id: I4b9296793fc8802f03bfebcb46446c8bc1a1d4e3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39782
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39859
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Change-Id: Id0eb9af939ebc6ca35afdaca0bdc358be016ddea
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37132
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37137
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Enabling 20 caused generated initfile procedures to
change.
Chip target needed to be added to p9.fbc.ioo_dl.scom.initfile
Change-Id: Id24aa67f8d2c3f07ef85ed3bf8a555c85b4a0d72
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38324
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38328
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Change-Id: Ia4e69cf50548e355cfb7cbf5e67be48e61427ffa
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34318
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34348
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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Change-Id: Ib2e652ad78971ac12084ce1053101c081c34b590
RTC:165584
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33566
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33568
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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-Update code generation to wrap getScom/putScom getSpy/putSpy
calls in FAPI_TRY macro to save space and be consistient with
the existing hwp procedure style.
Change-Id: I37975ec424b2b369cec200ddef8a05e650954c38
RTC:165557
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33557
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33561
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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-When refactoring the code to support iterating over EC levels
the optimization implemented to consolidate writes to the same
scom address was inadvertently removed, this commit restores
that optimization.
Change-Id: I43109b6c1e7ed2d4ed2f84f429f86cbe50553f88
RTC:164881
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33379
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33380
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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-Add support for looping over various EC levels for
SCOM and Scan init files
Change-Id: I7463b71698856922829cddc0e4d8d179803a1db8
RTC:159043
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31688
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31874
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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1. Added HW372116 fix to INT initfile
2. Changes to NX FIR actions, fix to disable abc checker
3. Added Issue 632 fix to MMU initfile
Change-Id: I00a1b646738decefef9e540f655d5d9d0a825744
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29768
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Emmanuel Sacristan <esacris@us.ibm.com>
Reviewed-by: CHRISTOPHER D. HANUDEL <chanudel@us.ibm.com>
Dev-Ready: CHRISTOPHER D. HANUDEL <chanudel@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31205
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
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Change-Id: Iee61f2987f192790c16685f51ac03fe840acf819
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28954
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31204
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
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> Implementing bits definition in nx initfile
> Modifying fir values in mmu initfile to compensate for deadbits
Change-Id: I79e7ffb367db2a3505a25d3e0455c5f875e5304a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28451
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31203
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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Change-Id: I7ff56a26d48f96e285b05e9bb37c68fb4c1a0379
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27769
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31202
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
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- The spyname needs to be added only once to the scom list because
we iiterate over all spynames
- Create unique enum variable names for scom initfile
Change-Id: I3f003f1810237b07da0d931c2773d548eab33531
Original-Change-Id: I6b5faab70b4867c17f72fc536d792e9459087857
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26872
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31201
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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Change-Id: I70dd2393e923a88428b6d00c0ec48113dd2630cd
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25533
Tested-by: Jenkins Server
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31200
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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