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| author | Jenny Huynh <jhuynh@us.ibm.com> | 2017-07-17 10:51:00 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-07-26 09:31:47 -0400 |
| commit | ea61a3d0656df9c254d78ae4faaa270338d1e85a (patch) | |
| tree | 8deb96410ba1608016970e91f9018c04420ce72e /src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C | |
| parent | cc04b895b7614ea7536f00fe8dd4b0fc40428faa (diff) | |
| download | talos-sbe-ea61a3d0656df9c254d78ae4faaa270338d1e85a.tar.gz talos-sbe-ea61a3d0656df9c254d78ae4faaa270338d1e85a.zip | |
Fixing mmu epsilon write cycles value
p9_mmu_scom is called in p9_sbe_scominit, but ATTR_PROC_EPS_WRITE_CYCLES_T1/2
does not get set until later in the IPL sequence.
Moving initialization of mmu write epsilon values to p9_chiplet_scominit.C
Change-Id: Ibf325fc4b132070b95ea3f55b92090109ab30406
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43210
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43214
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C index 652439b0..0fba3da9 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C @@ -63,10 +63,6 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW414700, TGT0, l_TGT0_ATTR_CHIP_EC_FEATURE_HW414700)); fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, TGT1, l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE)); - fapi2::ATTR_PROC_EPS_WRITE_CYCLES_T1_Type l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T1; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_WRITE_CYCLES_T1, TGT1, l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T1)); - fapi2::ATTR_PROC_EPS_WRITE_CYCLES_T2_Type l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T2; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_WRITE_CYCLES_T2, TGT1, l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T2)); fapi2::buffer<uint64_t> l_scom_buffer; { FAPI_TRY(fapi2::getScom( TGT0, 0x5012c03ull, l_scom_buffer )); @@ -134,8 +130,6 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& { FAPI_TRY(fapi2::getScom( TGT0, 0x5012c1dull, l_scom_buffer )); - l_scom_buffer.insert<0, 12, 52, uint64_t>(l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T1 ); - l_scom_buffer.insert<16, 12, 52, uint64_t>(l_TGT1_ATTR_PROC_EPS_WRITE_CYCLES_T2 ); l_scom_buffer.insert<12, 4, 60, uint64_t>(literal_0x1 ); l_scom_buffer.insert<28, 4, 60, uint64_t>(literal_0x1 ); FAPI_TRY(fapi2::putScom(TGT0, 0x5012c1dull, l_scom_buffer)); |
