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-rw-r--r--src/import/chips/p9/procedures/hwp/cache/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_thread_control.C2
-rwxr-xr-xsrc/import/chips/p9/procedures/hwp/core/p9_thread_control.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/nestfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H2
-rwxr-xr-xsrc/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C2
-rwxr-xr-xsrc/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/pervfiles.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/Makefile2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/pmfiles.mk2
195 files changed, 195 insertions, 195 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/Makefile b/src/import/chips/p9/procedures/hwp/cache/Makefile
index a95923ab..475de65e 100644
--- a/src/import/chips/p9/procedures/hwp/cache/Makefile
+++ b/src/import/chips/p9/procedures/hwp/cache/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/cache/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/cache/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk b/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk
index f8ae915e..135972bc 100644
--- a/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/cache/cachehcdfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H
index d73007e7..e6f4bdf8 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C
index 3b2887c4..683d89ea 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H
index 16b97e5b..42eeaa5d 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_arrayinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C
index 2978337b..f31deedf 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H
index 7b55f9ee..82172678 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C
index 0cf09244..0ce09b0d 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H
index 2033f38f..051db751 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
index 8f35b4ed..eeee6c65 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H
index 1582c76d..da60602a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C
index 64b30d93..7467ee53 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H
index 3c48f52a..20a28f27 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H
index 0da2ea3b..5674c532 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C
index 4a2e620f..f109e02f 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H
index 714395cf..d42f1927 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H
index 1754c690..08a5b2b7 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C
index d0e592a4..198a7034 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H
index 24c329f8..233342f6 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_occ_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
index c5193803..e6130a8a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H
index 656616f4..4191244a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_poweron.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C
index 5398597e..19116807 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H
index 394fb6f6..ccdd3c50 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_ras_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C
index b34ae956..85690d8b 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H
index 3712cafb..bc3b1153 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
index 96ce825d..6b8656ff 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
index cc3e8884..08380f50 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
index 38ee4977..8af66306 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H
index ded02249..26029adc 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
index a7bc1510..fa20765a 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H
index d0ad61d6..c5ffc609 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/Makefile b/src/import/chips/p9/procedures/hwp/core/Makefile
index 15ace37d..0ef85918 100644
--- a/src/import/chips/p9/procedures/hwp/core/Makefile
+++ b/src/import/chips/p9/procedures/hwp/core/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/core/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/core/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk b/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk
index b7c2abcc..69b681fb 100644
--- a/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/core/corehcdfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H
index 1c766fb3..c3310789 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C
index 0706e244..6145ad1a 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H
index dde880ee..cc8daf0b 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C
index 9007a7f8..d954b97d 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H
index c86b128c..00896101 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H
index 9db24521..e2f2d206 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C
index fa147a3d..38645d6b 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H
index 22c88c3f..e162d0e2 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C
index 86e72aac..8dac9915 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H
index accbf0ea..ca278ec2 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C
index 9211d7fc..cfe8fe40 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H
index 7dad1c6e..c6f77b9f 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C
index 729f98b7..7e83c95f 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H
index f3bfad93..aa6c6c1d 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C
index 5e66f673..5dda8e1d 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H
index 91b73cf9..8528c491 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C
index 6ad7100f..fe760e5c 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H
index 511b35c4..65657c1d 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C
index b8f6be7e..ec8f73db 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H
index a998c4bd..bd510b03 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
index 54ed6dd5..8c199de8 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
index f69ce528..79a74c7f 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H
index 7065028e..9e6434b4 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
index 3cccb8b5..d7bf6491 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H
index 75e94909..514d52e4 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C
index fb6affa0..20cdcf05 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H
index d143fd43..e82ba9b0 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C
index 529fd829..742244d5 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_thread_control.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_thread_control.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H
index 14821a5c..6c39f07e 100755
--- a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/core/p9_thread_control.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/core/p9_thread_control.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/Makefile b/src/import/chips/p9/procedures/hwp/initfiles/Makefile
index 123518a1..74b45b29 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/Makefile
+++ b/src/import/chips/p9/procedures/hwp/initfiles/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/initfiles/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/initfiles/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C
index e85d8585..ded26be9 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H
index 69653c03..d2035ba6 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C
index 1186e9d2..7932704d 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H
index 8f8edb08..aafa364a 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
index 950a088d..edb49b29 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H
index bc56a154..44097255 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/Makefile b/src/import/chips/p9/procedures/hwp/lib/Makefile
index 059fb2f3..6bff4cf0 100644
--- a/src/import/chips/p9/procedures/hwp/lib/Makefile
+++ b/src/import/chips/p9/procedures/hwp/lib/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/lib/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/lib/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk b/src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk
index cbcd12ee..e20c8579 100644
--- a/src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/lib/libcommonfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/lib/libcommonfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H b/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H
index 9bb01bce..6d529928 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C b/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C
index 05cd69e7..6cff40fd 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H b/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H
index f119bfaf..cbfc130c 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_common_pro_epi_log.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H
index d09b7014..bed34658 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_hcd_common.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_hcd_common.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H b/src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H
index 38e94226..2b818254 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_pm_stop_history.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/Makefile b/src/import/chips/p9/procedures/hwp/nest/Makefile
index 8c4adc0b..24976437 100644
--- a/src/import/chips/p9/procedures/hwp/nest/Makefile
+++ b/src/import/chips/p9/procedures/hwp/nest/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/nest/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/nest/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/nest/nestfiles.mk b/src/import/chips/p9/procedures/hwp/nest/nestfiles.mk
index b3ddbdff..847d6015 100644
--- a/src/import/chips/p9/procedures/hwp/nest/nestfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/nest/nestfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/nest/nestfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/nest/nestfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
index 360c5837..f7d41003 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_access.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
index 0b8e1a15..b2ac9083 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_access.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
index 7782cae2..d0ea4eb5 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
index 667e3f6b..69b66c39 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H
index d0449e0d..aed13132 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_constants.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_constants.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
index e270772a..9c58a9e9 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_setup.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
index ffdd38b0..93be5415 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_adu_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
index 4c9e3a12..ccb4ad17 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
index af73102e..ebf633ed 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C b/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C
index 5a3970b3..04b5d939 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_access.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_access.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H b/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H
index 7e02c926..14cc914d 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_access.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C
index c4f32d8c..6a91e66a 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H
index e4be1c65..049d19e2 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_coherent_utils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H b/src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H
index f7914672..ee9b62e5 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_constants.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_constants.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H b/src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H
index 96ce4025..f0c9e9ec 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_pba_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C
index 840ad79b..c972d47d 100755
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H
index ee1acf4a..f0b2ecd7 100755
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_fabricinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H
index 0fd5b531..5a6f430f 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_hb_structures.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
index 10380058..b1521ec3 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H
index e5536789..fced2b1e 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
index 1fe5dc4f..33bd345d 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H
index d3017dcf..fad6629b 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C
index a2510582..3bf2b451 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H
index 4129098e..a1a87168 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/Makefile b/src/import/chips/p9/procedures/hwp/perv/Makefile
index ac2ee6de..800ff640 100644
--- a/src/import/chips/p9/procedures/hwp/perv/Makefile
+++ b/src/import/chips/p9/procedures/hwp/perv/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/perv/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/perv/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C
index e850723f..e36da6b9 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H
index c6a0c6f2..fa51e213 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C b/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C
index 364d4013..3c90b0b8 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H b/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H
index b2472eb3..b323585d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_perv_sbe_cmn.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C
index d11fe6bf..f0ad26d0 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_ram_core.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H
index 46f0eaf7..2396fb31 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_ram_core.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_ram_core.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C
index 79046f0e..04f9c0da 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H
index 9fc72c1b..cb3a1d88 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H
index 0a5e2a09..c2dd153c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_attr_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C
index 1cd61c93..2a9a8a06 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H
index 88c3bf21..3bcd3b4d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C
index 4d28bdbd..150c24cb 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H
index 575536d9..fb26843c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C
index 521078bd..c832801c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H
index 72d20577..a324b0c8 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
index a36fa629..3db37dcd 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H
index a45218b9..f90f6a3f 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H
index c2b1caad..c40021e1 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H
index feeec54b..c3b1a66b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C
index 3a8a765c..d415f2d1 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H
index 180d8c66..82e4cc6a 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_clock_test2.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C
index c9586829..46e9a4b6 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_common.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H
index f3876594..fbc93fe3 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_common.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C
index d9a3f2d5..d35e527b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H
index 00a5ebc6..5294e80c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_enable_seeprom.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C
index 25d61ad0..0d198208 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H
index 845b68e9..a6a96665 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
index ce8302a9..418110e1 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H
index 5a048f1d..c748c5bc 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C
index ff4bde17..0e5f382e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H
index da24195e..3760525a 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_repr_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
index 00e00d24..0e043e35 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H
index c1f186bd..0af47dbc 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
index 25336c49..0de94fff 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
index eabe73f1..97d12b48 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C
index 63bbe75e..80f3a927 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H
index 6c7b2dfb..0bd3fd00 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
index 434e0137..480aa82d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H
index 90a8321e..f64538c5 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
index d0737f78..a31883b1 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H
index efc40a97..39ca81a2 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
index 79e0c0e3..be1970de 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H
index 025d2377..c90ef370 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H
index b05c7db1..6a883373 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
index 9dc91da6..f8097428 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H
index b5dbbe99..a78d6cc4 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C
index af7c2299..e31112e6 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H
index 3c40e9aa..77bfa417 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C
index 420680f7..7eb2651d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H
index c41909ae..b2cc08ec 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C
index e7797e75..d6b3aa50 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H
index a1ab2263..3faf0e0c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_evid.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C
index f55ae68d..b1d932ac 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H
index a9e777f6..1de5a90e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C
index 151aa89d..c46ea5b4 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H
index 9ab5e359..86338ebc 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_arrayinit.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C
index c953c3cf..ef983fe5 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H
index 39383792..7fe37b03 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C
index 69c6f6c3..7d68238c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H
index 34d94425..2569181c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init2.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
index c7af39d3..aace2054 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H
index c5367d97..19370c96 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C
index f7960207..26c24bad 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H
index 441a7a6e..9a120e14 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_reset.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C
index b8c22322..35965324 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H
index c18e9a7f..908bf804 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C
index 42957145..7bc7575e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H
index 2b99ade3..898a76fd 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C
index 2c351d74..1950b315 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H
index 27ba211c..c682763b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_gptr_time_repr_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C
index f1150966..9d438a23 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H
index abf1f54c..641ad767 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C
index 7c933122..94c16f0e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H
index e458d2be..50599fa5 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_ld_image.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C
index 53aed3bb..f5c2319b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H
index 134fc853..f525bbf7 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_repr_initf.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H
index a53d025f..7a546a23 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_switch_gears.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/perv/pervfiles.mk b/src/import/chips/p9/procedures/hwp/perv/pervfiles.mk
index d4b77bb7..70d989d0 100644
--- a/src/import/chips/p9/procedures/hwp/perv/pervfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/perv/pervfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/perv/pervfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/perv/pervfiles.mk $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/pm/Makefile b/src/import/chips/p9/procedures/hwp/pm/Makefile
index 65f3170a..f8c3cdd8 100644
--- a/src/import/chips/p9/procedures/hwp/pm/Makefile
+++ b/src/import/chips/p9/procedures/hwp/pm/Makefile
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/pm/Makefile $
+# $Source: src/import/chips/p9/procedures/hwp/pm/Makefile $
#
# OpenPOWER sbe Project
#
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C
index fce9dea9..5a2a7daa 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H
index f4aaaf44..ec18455e 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm.H
index d14c021a..536e9f34 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C
index c88407cd..1ef50413 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H
index e5b548fb..f1268381 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_access.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C
index ef7f0138..c6bd0ac2 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H
index a366bbd8..27a53ff2 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_circular.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C
index 292659cb..36c814d6 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H
index 27adcc48..aa4299ff 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_indir_setup_linear.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H
index 1130fcaa..2075fcdb 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C
index 4809d65e..87b0b88c 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_utils.C $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
index 3524991e..101c3d8e 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: import/chips/p9/procedures/hwp/pm/p9_pm_utils.H $ */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H $ */
/* */
/* OpenPOWER sbe Project */
/* */
diff --git a/src/import/chips/p9/procedures/hwp/pm/pmfiles.mk b/src/import/chips/p9/procedures/hwp/pm/pmfiles.mk
index e34a62c4..2c29c90b 100644
--- a/src/import/chips/p9/procedures/hwp/pm/pmfiles.mk
+++ b/src/import/chips/p9/procedures/hwp/pm/pmfiles.mk
@@ -1,7 +1,7 @@
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
-# $Source: import/chips/p9/procedures/hwp/pm/pmfiles.mk $
+# $Source: src/import/chips/p9/procedures/hwp/pm/pmfiles.mk $
#
# OpenPOWER sbe Project
#
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