1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
|
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C $ */
/* */
/* OpenPOWER sbe Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
///
/// @file p9_block_wakeup_intr.C
/// @brief Set/reset the BLOCK_REG_WKUP_SOURCES bit in the PCBS-PM associated
/// with an EX chiplet
///
// *HWP HWP Owner: Amit Kumar <akumar3@us.ibm.com>
// *HWP FW Owner: Prem Jha <premjha1@in.ibm.com>
// *HWP Team: PM
// *HWP Level: 2
// *HWP Consumed by: FSP:HS
///
/// @verbatim
/// High-level procedure flow:
///
/// With set/reset enum parameter, either set or clear PMGP0(53)
///
/// Procedure Prereq:
/// - System clocks are running
/// @endverbatim
///
//------------------------------------------------------------------------------
// ----------------------------------------------------------------------
// Includes
// ----------------------------------------------------------------------
#include <p9_block_wakeup_intr.H>
#include <p9_hcd_common.H>
// This must stay in sync with enum OP_TYPE enum in header file
const char* OP_TYPE_STRING[] =
{
"SET",
"CLEAR"
};
// ----------------------------------------------------------------------
// Procedure Function
// ----------------------------------------------------------------------
/// @brief @brief Set/reset the BLOCK_INTR_INPUTS bit in the Core PPM
/// associated with an EX chiplet
fapi2::ReturnCode
p9_block_wakeup_intr(
const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_core_target,
const p9pmblockwkup::OP_TYPE i_operation)
{
FAPI_INF("> p9_block_wakeup_intr...");
fapi2::buffer<uint64_t> l_data64 = 0;
// Get the core number
uint8_t l_attr_chip_unit_pos = 0;
fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv =
i_core_target.getParent<fapi2::TARGET_TYPE_PERV>();
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS,
l_perv,
l_attr_chip_unit_pos),
"fapiGetAttribute of ATTR_CHIP_UNIT_POS failed");
l_attr_chip_unit_pos = l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET;
// Read for trace
{
fapi2::buffer<uint64_t> l_cpmmr = 0;
fapi2::buffer<uint64_t> l_gpmmr = 0;
// Read the CPMMR and GPMMR as a trace
FAPI_TRY(fapi2::getScom(i_core_target,
C_CPPM_CPMMR,
l_cpmmr),
"getScom of CPMMR failed");
FAPI_TRY(fapi2::getScom(i_core_target,
C_PPM_GPMMR,
l_gpmmr),
"getScom of GPMMR failed");
FAPI_DBG("Debug: before setting PPM_WRITE_OVERRIDE on Core %d - CPPMR: 0x%016llX GPMMR: 0x%016llX",
l_attr_chip_unit_pos, l_cpmmr, l_gpmmr);
}
// Ensure access to the GPMMR is in place using CPMMR Write Access
// Override. This will not affect the CME functionality as only the
// Block Wake-up bit is being manipulated -- a bit that the CME does
// not control but does react upon.
FAPI_INF("Set the CPPM PPM Write Override");
l_data64.flush<0>().setBit<C_CPPM_CPMMR_PPM_WRITE_OVERRIDE>();
FAPI_TRY(fapi2::putScom(i_core_target,
C_CPPM_CPMMR_OR,
l_data64),
"putScom of CPMMR to set PMM Write Override failed");
l_data64.flush<0>().setBit<BLOCK_REG_WKUP_EVENTS>();
switch (i_operation)
{
case p9pmblockwkup::SET:
// @todo RTC 144905 Add Special Wakeup setting here when available
FAPI_INF("Setting GPMMR[Block Interrupt Sources] on Core %d",
l_attr_chip_unit_pos);
FAPI_TRY(fapi2::putScom(i_core_target,
C_PPM_GPMMR_OR,
l_data64),
"Setting GPMMR failed");
// @todo RTC 144905 Add Special Wakeup clearing here when available
break;
case p9pmblockwkup::SET_NOSPWUP:
FAPI_INF("Setting GPMMR[Block Interrupt Sources] without Special Wake-up on Core %d",
l_attr_chip_unit_pos);
FAPI_TRY(fapi2::putScom(i_core_target,
C_PPM_GPMMR_OR,
l_data64),
"Setting GPMMR failed");
break;
case p9pmblockwkup::CLEAR:
FAPI_INF("Clearing GPMMR[Block Interrupt Sources] on Core %d",
l_attr_chip_unit_pos);
FAPI_TRY(fapi2::putScom(i_core_target,
C_PPM_GPMMR_CLEAR,
l_data64),
"Clearing GPMMR failed");
break;
default:
;
}
FAPI_INF("Clear the CPPM PPM Write Override");
l_data64.flush<0>().setBit<C_CPPM_CPMMR_PPM_WRITE_OVERRIDE>();
FAPI_TRY(fapi2::putScom(i_core_target,
C_CPPM_CPMMR_CLEAR,
l_data64),
"putScom of CPMMR to clear PMM Write Override failed");
fapi_try_exit:
FAPI_INF("< p9_block_wakeup_intr...");
return fapi2::current_err;
}
|
