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path: root/src/build/configs/simics_axone.config
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* Support for ATTR_TMP and GUARD in standalone simicsDan Crowell2020-01-101-1/+1
| | | | | | | | | | | | | | | | | If a file called ATTR_TMP or GUARD exists in the simics search path, they will be automatically loaded into pnor when simics starts. The offset is computed when the pnor is built by way of a generated python file that we then load into simics. Change-Id: I4d68215a589dcbdaefb2a67e65d1f6928ce639fa Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88398 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Luis P Fernandez <luis.fernandez@ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
* Automatically set VPD cache flags based on EEPROM cache settingDan Crowell2019-10-171-26/+4
| | | | | | | | | | | | | | | | Added more logic to the vpd/HBconfig file to force the correct (use hardware) values for the VPD code if the EECACHE flag (SUPPORT_EEPROM_CACHING) is set. This allows the system config files to not include the unused VPD flags anymore. Change-Id: I87f7c5f3e51e3121c081b3007164dbf21cbafba8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/84757 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V Swenson <cswenson@us.ibm.com> Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
* Force sbe update loop if a change in OMI freq is detectedChristian Geddes2019-07-171-0/+3
| | | | | | | | | | | | | | After we parse the SPD to determine correct frequency settings we need to check if the optimal settings found differ from the original settings we booted with. This commit adds a check for OMI frequency changes in addition to the existing nest frequency and mc sync mode checks. Change-Id: Icaf64eda225df3aab82a033866663e3103cef55f RTC: 207596 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78739 Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Add planar vpd support to Axone simicsMatt Derksen2019-06-241-1/+10
| | | | | | | | | | | | | | | | Simics support was added so now we can read directly from hardware. Change-Id: I161a847377c7271d14bf94b2e1fa7c3c63c2530c RTC:209309 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78305 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Unset CONSOLE_OUTPUT_ERRORDISPLAY in axone configChristian Geddes2019-06-121-0/+1
| | | | | | | | | | | | | | | We recently enabled the CONSOLE config flap to test the lpc console in simics. This caused a lot of slowdown during the test cases when we force a bunch of errors. This commit disables diplaying errors to the console in axone simics. Change-Id: I80f7868d80e4186d8034a0326d09a290d599ed07 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78777 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Enable the UART console in Axone Simics configDan Crowell2019-06-031-0/+3
| | | | | | | | | | | | | | | Enable the code to support the console output and force Simics to display it. Change-Id: Ie7aaad150ce9191cf53387af8d147f293d98126a Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78196 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Force Axone simics to read all VPD from HW with config flagsChristian Geddes2019-05-141-15/+13
| | | | | | | | | | | | | | | | | | This commit will set the config flags to always read from HW rather than the old VPD cache in PNOR. Until this point in Axone we were still using an old copy of MVPD that we write into PNOR during the startup simics scripts. From this commit onward we will use the actual VPD simics provides. To handle this, some updates we needed to the PG rules for Axone. Change-Id: Ie06cefe1aec37edfc4c379ee1173bc51fc6bbe1f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76519 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable IPLTIME_CHECKSTOP_ANALYSIS in axoneMatt Derksen2019-04-251-4/+4
| | | | | | | | | | Simics now supports the enablement so we now pass istep 6.11 (host_start_occ_xstop_handler) Change-Id: Ibc57795d645e98d7585eb45a122e3d127f16bbf1 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75563 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Run Axone simics all the way to completion by defaultChristian Geddes2019-04-191-3/+2
| | | | | | | | | | | | | | | | Prior to this commit we ended the IPL at istep 14.7 and ran the CXX test suite before shutting down. This commit will allow us to run through istep 21 like a standard IPL. Change-Id: Ifb567dc30e7ecbb31ed59889ff900411633844bf Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76098 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Compile Explorer MSS libs in our istepsmss libChristian Geddes2019-04-031-0/+3
| | | | | | | | | | | | | | | | We added P9A awhile back but forgot to add in the explorer libs. Some of the MSS hwps are requiring these so we need to add them. When we pulled this in it caused the HBI image for the Nimbus and Cumulus standalone layouts to be too large. To get around this we will not compile any Axone/Explorer HWP code in non-axone system configurations. Change-Id: I041f5f160a6e530995bbb1b350a1b2362704fbc8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75224 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Force VPD IO through HW (Axone) ,add plat function to get OCMB VPDRoland Veloz2019-03-071-2/+16
| | | | | | | | | | | | | | | | | This commit follows up on previous work that pulled in the code that can find the correct EFD given a SPD blob of data which has the DDR SPD and the EFD for the DDIMM. This commit adds ocmb_spd.C which provides a DeviceFW::SPD read interface for OCBM targets, and hooks is up to the platform implementation of the FAPI interface platGetVPD for OCMB target. Also this commit forces all VPD IO in Axone to go through HW, which will actually read from the new EEPROM cache in pnor. RTC: 203718 Change-Id: I270500898c422d4c78daa3b917b1b2e5b049e856 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72165 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Method to execute testcases early in the bootDan Crowell2019-02-281-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | A new CONFIG variable has been created that will trigger the istep dispatcher to start the CXX unit test execution at some point during the boot rather than waiting until the end. This is useful for quick targeted testing and also for early bringup of new platforms. CONFIG_EARLY_TESTCASES is the new flag, and it uses ATTR_EARLY_TESTCASES_ISTEP to determine where in the boot to stop. Changes were required in several testcases to either skip the test completely (typically due to not having enough memory) or to add additional logic to load new support libraries on demand. The Axone platform has this flag enabled by default to execute testcases at the end of istep 6.9 (host_gard). Change-Id: I1da9479e2147d68102f44d60e064c3b79cc41bb6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71693 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Add new path in EEPROM device op to allow reading from new EECACHEChristian Geddes2019-02-161-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Recently a new EECACHE section was introduced to Hostboot. This section gets populated with a copy of every PRIMARY_VPD eeprom (someday could contain other eeprom roles also) during host_discover_targets. This commit add support to allow users to select where they want to perform their EEPROM device operation. If they pass CACHE to the deviceOp macro then a read will come from the pnor cache, writes will write to pnor cache and then also write to the eeprom HW. If HARDWARE is passed in then reads and writes will be directly done on the eeprom hardware. If AUTOSELECT is passed the code will check our cache to see if we have a copy of the eeprom in question, if we have a copy we will go the CACHE path, if no copy exists we will go the HARDWARE path. Along with this change some reorganization was done w/ the eeprom related files. RTC: 196805 Change-Id: If2c4e5d3e338a1a10780740c1a019eb4af003b73 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70822 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add EEPROM caching device opChristian Geddes2019-02-131-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces a new EEPROM_CACHE deviceOp and registers the OCMB_CHIP, PROC, and DIMM targets to it. This is part of the larger effort to transition for a "VPD" cache to an "EEPROM" cache in pnor. The deviceOp is currently called in hwasPlat's platPresenceDetect if the target in question has a ATTR_EEPROM_VPD_PRIMARY_INFO associated with it. The layout for the new EECACHE section in pnor is defined in eepromCache_const.H. Essentially it is a header that contains an array of record headers that tell where in the EECACHE pnor section a given cached EEPROM can be found. All EEPROM targets will be allocated space in the EECACHE section but only present targets will have their cache filled in. RTC: 196805 Change-Id: I49c341c9784be04ddf0259bd444f06c9baf8c6f1 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70520 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add temporary Axone simics workarounds to progress IPLChristian Geddes2019-02-051-0/+8
| | | | | | | | | | | | | | | | | | | | Currently there is no VRM hooked up to the other side of the AVSbus in simics. The simics team is working on this but for now we need to skip the istep that calls setup evid to set voltages. This can be removed when Simics gets this working. Also for now we are will skip starting checkstop handling early on in the IPL because the OCC model is not finished. This also can be changed when the model starts working. Change-Id: Ia0df49fedae97acceefe07e3f3c903bbe6aac83d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71097 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add new pnorLayoutAxone.xml w/ new EECACHE sectionChristian Geddes2019-01-141-0/+1
This commit introduces a new pnor layout which will be used when the simics_axone.config file is used. (Note: axone.config was renamed to simics_axone.config). This new layout introduces the EECACHE section which will be used to store copies of the various EEPROMS in the system. The eventual goal is to be able to remove the MVPD/DJVPD sections in PNOR and only use this EECACHE section Change-Id: Ifae610c4dd7f3aa9c87a5ca911cc4faa1ba2a98a Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70172 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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