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authorLuís Marques <luismarques@lowrisc.org>2020-01-13 15:33:07 +0000
committerLuís Marques <luismarques@lowrisc.org>2020-01-13 15:34:56 +0000
commit043c5eafa8789d76b06b93d157c928830c4d0814 (patch)
treee373af7d142c22802ef4158eecffbc8a2e86b3ea /llvm/lib
parentb11027a08620dce2887377c830be239a4af478b6 (diff)
downloadbcm5719-llvm-043c5eafa8789d76b06b93d157c928830c4d0814.tar.gz
bcm5719-llvm-043c5eafa8789d76b06b93d157c928830c4d0814.zip
[RISCV] Handle globals and block addresses in asm operands
Summary: These seem to be the machine operand types currently needed by the RISC-V target. Reviewers: asb, lenary Reviewed By: lenary Tags: #llvm Differential Revision: https://reviews.llvm.org/D72275
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
index 7247adf4884..60ea4044643 100644
--- a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -121,6 +121,14 @@ bool RISCVAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
case MachineOperand::MO_Register:
OS << RISCVInstPrinter::getRegisterName(MO.getReg());
return false;
+ case MachineOperand::MO_GlobalAddress:
+ PrintSymbolOperand(MO, OS);
+ return false;
+ case MachineOperand::MO_BlockAddress: {
+ MCSymbol *Sym = GetBlockAddressSymbol(MO.getBlockAddress());
+ Sym->print(OS, MAI);
+ return false;
+ }
default:
break;
}
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