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| author | Puyan Lotfi <puyan@puyan.org> | 2020-01-13 13:30:20 -0500 |
|---|---|---|
| committer | Puyan Lotfi <puyan@puyan.org> | 2020-01-13 13:39:54 -0500 |
| commit | 484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29 (patch) | |
| tree | 9df15a6c2b089c3924991462fa9c93633fd6b982 /llvm/lib | |
| parent | 7aed43b60739653b13b8503f9df4c958c44feed8 (diff) | |
| download | bcm5719-llvm-484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29.tar.gz bcm5719-llvm-484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29.zip | |
[llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands.
This patch makes it so that cases where multiple instructions that differ only
in their FrameIndex MachineOperand values no longer collide. For instance:
%1:_(p0) = G_FRAME_INDEX %stack.0
%2:_(p0) = G_FRAME_INDEX %stack.1
Prior to this patch these instructions would collide together.
Differential Revision: https://reviews.llvm.org/D71583
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/MIRVRegNamerUtils.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp index d0670dcc406..fcc40b26c52 100644 --- a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp +++ b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp @@ -68,6 +68,8 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) { return MO.getImm(); case MachineOperand::MO_TargetIndex: return MO.getOffset() | (MO.getTargetFlags() << 16); + case MachineOperand::MO_FrameIndex: + return llvm::hash_value(MO); // We could explicitly handle all the types of the MachineOperand, // here but we can just return a common number until we find a @@ -77,7 +79,6 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) { // TODO: Handle the following Index/ID/Predicate cases. They can // be hashed on in a stable manner. - case MachineOperand::MO_FrameIndex: case MachineOperand::MO_ConstantPoolIndex: case MachineOperand::MO_JumpTableIndex: case MachineOperand::MO_CFIIndex: |
